BD9B301MUV-LB Datasheet, PDF (24/33 Pages) Rohm – Over Current Protection

BD9B301MUV-LB
Datasheet
PCB Layout Design
In the step-down DC/DC converter, a large pulse current flows into two loops. The first loop is the one into which the current
flows when the High-Side FET is turned ON. The flow starts from the input capacitor CIN, runs through the FET, inductor L
and output capacitor COUT and back to GND of CIN via GND of COUT. The second loop is the one into which the current
flows when the Low-Side FET is turned on. The flow starts from the Low-Side FET, runs through the inductor L and output
capacitor COUT and back to GND of the Low-Side FET via GND of COUT. Route these two loops as thick and as short as
possible to allow noise to be reduced for improved efficiency. It is recommended to connect the input and output capacitors
directly to the GND plane. The PCB layout has a great influence on the DC/DC converter in terms of all of the heat
generation, noise and efficiency characteristics.
Figure 52. Current Loop of Buck Converter
Accordingly, design the PCB layout considering the following points.
 Connect an input capacitor as close as possible to the IC PVIN terminal on the same plane as the IC.
 If there is any unused area on the PCB, provide a copper foil plane for the GND node to assist heat dissipation from
the IC and the surrounding components.
 Switching nodes such as SW are susceptible to noise due to AC coupling with other nodes. Route the coil pattern as
thick and as short as possible.
 Provide lines connected to FB far from the SW nodes.
 Place the output capacitor away from the input capacitor in order to avoid the effect of harmonic noise from the input.
Power Dissipation
When designing the PCB layout and peripheral circuitry, sufficient consideration must be given to ensure that the power
dissipation is within the allowable dissipation curve.
4.0
3.0
(1)2.66 W
2.0 _{(2)1.77 W}
(3)0.62 W
(4)0.27 W
0
0 25 50
75 100
125 150
(1) 4-layer board (surface heat dissipation copper foil 5505 mm²)
(copper foil laminated on each layer)
θJA = 47.0°C/W
(2) 4-layer board (surface heat dissipation copper foil 6.28 mm²)
(copper foil laminated on each layer)
θJA = 70.62°C/W
(3) 1-layer board (surface heat dissipation copper foil 6.28 mm²)
θJA = 201.6°C/W
(4) IC only
θJA = 462.9°C/W
Board specification: Glass-Epoxy, 70mm x 70mm x 1.6mm
Copper foil thickness: Front side and reverse side 70µm be used,
2nd and 3rd 35µm be used.
Ambient temperature: Ta [°C]
Figure 53. Thermal Derating Characteristics
(VQFN016V3030)
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TSZ02201-0J3J0AJ00830-1-2
2015.04.02 Rev.001