BR25G320-3 Datasheet, PDF (21/36 Pages) Rohm – SPI BUS EEPROM

BR25G320-3
Datasheet
Power-Up/Down Conditions
1. At Standby
Set CSB “H”, and be sure to set SCK, SI input “L” or “H”. Do not input intermediate electric potantial.
2. At Power ON/OFF
When Vcc rise or fall, set CSB=”H” (=Vcc).
When CSB is “L”, this IC gets in input accept status (active). If power is turned on in this status, noises and the likes may
cause malfunction, erroneous write or so. To prevent these, at power ON, set CSB “H”. (When CSB is in “H” status, all
inputs are canceled.)
Vcc
CSB
Good example Bad example
Figure 58. CSB timing at power ON/OFF
(Good example) CSB terminal is pulled up to Vcc.
At power OFF, take 10ms or more before supply. If power is turned on without observing this condition, the IC
internal circuit may not be reset.
(Bad example) CSB terminal is “L” at power ON/OFF.
In this case, CSB always becomes “L” (active status), and EEPROM may have malfunction or erroneous write owing
to noises and the likes.
Even when CSB input is High-Z, the status becomes like this case.
3. Operating Timing after Power ON
As shown in Figure 59, at standby, when SCK is “H”, even if CSB is fallen, SI status is not read at fall edge. SI status is
read at SCK rise edge after fall of CSB. At standby and at power ON/OFF, set CSB “H” status.
CSB
SCK
Even if CSB is fallen at SCK=”H”,
SI status is not read at that edge.
Command start here. SI is read.
0
1
2
SI
Figure 59. Operating timing
4. At Power on Malfunction Preventing Function
This IC has a POR (Power On Reset) circuit as mistake write countermeasure. After POR action, it gets in write disable
status. The POR circuit is valid only when power is ON, and does not work when power is OFF. When power is ON, if the
recommended conditions of the following tR, tOFF, and Vbot are not satisfied, it may become write enable status owing to
noises and the likes.
Vcc
tR
tOFF
Vbot
0
Figure 60. Rise waveform
Recommended conditions of tR, tOFF, Vbot
tR
tOFF
10ms or below 10ms or higher
100ms or below 10ms or higher
Vbot
0.3V or below
0.2V or below
5. Low Voltage Malfunction Preventing Function
LVCC (Vcc-Lockout) circuit prevents data rewrite action at low power, and prevents wrong write.
At LVCC voltage (Typ = 1.2V) or below, it prevent data rewrite.
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