BU2381FV Datasheet, PDF (2/5 Pages) Rohm – Multimedia ICs Clock generator for digital still camera

Multimedia ICs
zBlock diagram
14.318182MHz
XTAL_IN
XTAL_OUT
XTAL
OSC
CLK2ON
FS1
FS2
FS3
BU2381FV
Data1a
Data1b
Data1c
PLL1 144M
180M 228M
PLL2
192MHz
PLL3
177MHz
1/2
71.877274MHz or 90.314686MHz
or 114.54546MHz
1/2
96.016044MHz
1/2
96.016044MHz
1/4
48.008022MHz
CLK1
CLK2
1 / 10
17.734450MHz
14.318182MHz
REF_CLK
zPin descriptions
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Pin name
REFCLK
VDD
FS3
VSS
XIN
TEST
XOUT
FS2
CLK1OUT
FS1
CLK2ON
VSS
VDD
CLK2OUT
VSS
VDD
Functions
14.3MHz / 17.7MHz clock output
Analog VDD
CLK1, 2 output select with pull up
Analog GND
Standard crystal input
Input for test mode (normally open)
Standard crystal output
CLK1, 2 output select with pull up
71M / 90M / 96M / 114MHz clock output
REFCLK output select with pull up
CLK2 output control with pull up H : enable L : disable
GND for CLK1, 2 clock output and Logic circuit
VDD for CLK1, 2 clock output and Logic circuit
96M / 48M clock output
GND for REFCLK clock output
VDD for REFCLK clock output
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