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BU21024FV-M_14 Datasheet, PDF (2/20 Pages) Rohm – Resistive Type Touch Screen Controller ICs
BU210243FGVU-LM BU21023MUV BU21024FV-M
Pin Configuration and Pin Description
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Datasheet
No.
Pin Name
I/O
Function
Figure
1
EDA
I/O EEPROM SDA
C
2
ECL
O EEPROM SCL
C
3
YNM
I/O Screen interface (Test input)
E
4
XNM
I/O Screen interface (Test input)
E
5
YPM
I/O Screen interface (Test input)
E
6
XPM
I/O Screen interface (Test input)
E
7
YN
I/O Screen interface
E
8
XN
I/O Screen interface
E
9
YP
I/O Screen interface
E
10
XP
I/O Screen interface
E
11
T4
I/O Test pin
E
12
PVDD
O Regulator output (for supply screen voltage)
-
13
AVDD
O Regulator output (for supply analog block)
-
14
DVDD
I/O Regulator output (for supply digital block) or supply digital voltage
-
15 DVDD_EXT
I Digital voltage enable (H=Hi-Z , L=DVDD enable)
E
16
VDD
- Supply voltage
-
17
VSS
- Ground
-
18
RSTB
I H/W reset
E
19
CLK_EXT
I Supply external clock for debug
A
20
T1
I Test pin
A
21
T2
I Test pin
A
22
T3
I Test pin
A
23
IFSEL
I Interface select pin (L=SPI, H=2-wire serial)
A
24
SO
O
SPI Serial data output
2-wire
-
F
25
INT
O Interrupt output
C
26
SEL_CSB
I
SPI Chip select
2-wire Slave address select
C
27
SDA_SI
I/O SPI Serial data input
2-wire Serial data in-out
C
28
SCL_SCK
I
SPI Serial clock input
2-wire Serial clock input
C
1. Please use 1.0µF capacitors between AVDD and DVDD to GND, and leave PVDD terminal open.
2. If DVDD_EXT=”H “, the DVDD pin can be connected to an external 1.8V power source.
3. Please pull up the ECL, EDA, and INT pins using 10k ohm resistors as shown in the application diagram at the end of this document.
ECL and EDA pins may be directly connected to GND if an external EEPROM is not being used. Please connect a 0.1µF capacitor between
T4 and GND. T1, T2 & T3 pins should be connected to GND.
4. When using the 2 wire serial interface, please pull up the SCL_SCK, SDA_SI pins via 10k ohms and leave SO unconnected.
5. Please note that the values of resistors and capacitors mentioned here are only recommended values.
6. RSTB should be held low until supply voltage VDD has ramped up and has reached a stable level.
7. The polarity of INT pin is programmable via register 0x30
8. Connect CLK_EXT to GND for normal use
9. Please leave the XPM, XNM, YPM, YNM terminals open if they are not being used.
10. INT terminal is used as input pin in test mode.
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31.Mar.2014 Rev.003