BU21023GUL_16 Datasheet, PDF (2/21 Pages) Rohm – Resistive Type Touch Screen Controller ICs

BU21023GUL BU21023MUV BU21024FV-M
Pin Configuration and Pin Description
【BU21023GUL】
T4
PVDD
DVDD
VDD
VSS
A
XP
B
AVDD DVDD_EXT CLK_EXT
XN
YP
RSTB
T1
T2
C
YN
SEL_CSB
SO
T3
IFSEL
D
ECL
EDA
SCL_SCK
SDA_SI
INT
E
1
2
3
4
5
TOP VIEW (BALL SIDE DOWN)
ECL
EDA
SCL_SCK
SDA_SI
INT
E
YN
SEL_CSB
SO
T3
IFSEL
D
XN
YP
RSTB
T1
T2
C
XP
B
AVDD DVDD_EXT CLK_EXT
T4
PVDD
DVDD
VDD
VSS
A
1
2
3
4
5
BOTTOM VIEW (BALL SIDE UP)
No.
Pin Name
I/O
Function
Figure
D1
YN
I/O Screen interface
E
C1
XN
I/O Screen interface
E
C2
YP
I/O Screen interface
E
B1
XP
I/O Screen interface
E
A1
T4
I/O Test pin
E
A2
PVDD
O Regulator output (for supply screen voltage)
-
B3
AVDD
O Regulator output (for supply analog block)
-
A3
DVDD
I/O Regulator output (for supply digital block) or supply digital voltage
-
B4 DVDD_EXT
I Digital voltage enable (H=Hi-z , L=DVDD Enable)
E
A4
VDD
- Supply voltage
-
A5
VSS
- Ground
-
C3
RSTB
I H/W reset
E
B5
CLK_EXT
I Supply external clock for debug
A
C4
T1
I Test pin
A
C5
T2
I Test pin
A
D4
T3
I Test pin
A
D5
IFSEL
I Interface select pin (L=SPI, H=2-wire serial)
A
D3
SO
O SPI Serial data output
2-wire
-
F
E5
INT
O Interrupt output
C
D2
SEL_CSB
I SPI Chip select
2-wire Slave address select
C
E4
SDA_SI
I/O SPI Serial data input
2-wire Serial data in-out
C
E3 SCL_SCK
I SPI Serial clock input
2-wire Serial clock input
C
E2
EDA
I/O EEPROM SDA
C
E1
ECL
O EEPROM SCL
C
1. Please use 1.0µF capacitors between AVDD and DVDD to GND, and leave PVDD terminal open.
2. If DVDD_EXT=”H“, the DVDD pin can be connected to an external 1.8V power source.
3. Please pull up the ECL, EDA, and INT pins using 10k ohm resistors as shown in the application diagram at the end of this document.
ECL and EDA pins may be directly connected to GND if an external EEPROM is not being used. Please connect a 0.1µF capacitor between T4 and GND.
T1, T2 & T3 pins should be connected to GND.
4. When using the 2 wire serial interface, please pull up the SCL_SCK, SDA_SI pins via 10k ohms and leave SO unconnected.
5. Please note that the values of resistors and capacitors mentioned here are only recommended values.
6. RSTB should be held low until supply voltage VDD has ramped up and has reached a stable level.
7. The polarity of INT pin is programmable via register 0x30.
8. Connect CLK_EXT to GND for normal use.
9. INT terminal is used as input pin in test mode.
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TSZ02201-0L5L0F300840-1-2
7.June.2016 Rev.004