BD9E101FJ-LB Datasheet, PDF (2/33 Pages) Rohm – 7.0V to 36V Input, 1.0 A Integrated MOSFET Single Synchronous Buck DC/DC Converter

BD9E101FJ-LB
Pin Configuration
(TOP VIEW)
BOOT ¹
VIN 2
8 SW
7 PGND
EN ³
6 COMP
AGND 4
5 FB
Pin Description(s)
Pin No Pin Name
Figure 2. Pin assignment
Description
1
BOOT
Connect a bootstrap capacitor of 0.1µF between this terminal and SW terminal.
The voltage of this capacitor is the gate drive voltage of the high-side MOSFET.
2
VIN
Power supply terminal for the switching regulator and control circuit.
Connecting a 10µF ceramic capacitor is recommended.
Turning this terminal signal low-level (0.8V or lower) forces the device to enter the shut
3
EN
down mode. Turning this terminal signal high-level (2.5V or higher) enables the device.
This terminal must be terminated.
4
AGND Ground terminal for the control circuit.
5
FB
Inverting input node for the gm error amplifier.
See page 22 on how to calculate the resistance of the output voltage setting.
Input terminal for the gm error amplifier output and the output switch current comparator.
6
COMP
Connect a frequency phase compensation component to this terminal.
See page 23 on how to calculate the resistance and capacitance for phase
compensation.
7
PGND Ground terminal for the output stage of the switching regulator.
Switch node. This terminal is connected to the source of the high-side MOSFET and
8
SW
drain of the low-side MOSFET. Connect a bootstrap capacitor of 0.1µF between this
terminal and BOOT terminal. In addition, connect an inductor considering the direct
current superimposition characteristic.
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TSZ02201-0J3J0AJ00390-1-2
21.Feb.2014 Rev.002