BU7985KVT Datasheet, PDF (18/20 Pages) Rohm – 56bit LVDS Receiver 8:56 DeSerializer

●LVDS Data Inputs Timing Diagrams in Single Link
(Single-in / Dual-out Mode)
Previous Cycle
(2nd Pixel Data)
RCLK1+
Current Cycle
(1st Pixel Data)
RA1+/-
G22 R27 R26 R25 R24 R23 R22 G12 R17 R16 R15 R14 R13 R12 G22''
RB1+/-
B23 B22 G27 G26 G25 G24 G23 B13 B12 G17 G16 G15 G14 G13 B23''
RC1+/-
DE ^{VSYNC HSYNC} B27 B26 B25 B24 DE ^{VSYNC HSYNC} B17 B16 B15 B14 DE''
RD1+/-
X B21 B20 G21 G20 R21 R20 X B11 B10 G11 G10 R11 R10 X
Figure-13 Data Input Timing for Single Link
●Fail-Saｆe Hi-Z Operation
Connector attached (Receive Signal)
All Output
All Output
Toggled
Connector released (No Signal)
Hiz
Figure-14 Fail-Sage Hi-Z Operation
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