BD9E151NUX Datasheet, PDF (18/22 Pages) Rohm – 1ch Step-Down Switching Regulator

BD9E151NUX
Datasheet
Notes for use
(1) About Absolute Maximum Rating
When the absolute maximum ratings of application voltage, operating temperature range, etc. was exceeded, there is
possibility of deterioration and destruction. Also, the short Mode or open mode, etc. destruction condition cannot be
assumed. When the special mode where absolute maximum rating is exceeded is assumed, please give consideration
to the physical safety countermeasure for the fuse, etc.
(2) About GND Electric Potential
In every state, please make the electric potential of GND Pin into the minimum electrical potential. Also, include the
actual excessive effect, and please do it such that the pins, excluding the GND Pin do not become the voltage below
GND.
(3) About Heat Design
Consider the Power Dissipation (Pd) in actual state of use, and please make Heat Design with sufficient margin.
(4) About short circuit between pins and erroneous mounting
When installing to set board, please be mindful of the direction of the IC, phase difference, etc. If it is not installed
correctly, there is a chance that the IC will be destroyed. Also, if a foreign object enters the middle of output, the middle
of output and power supply GND, etc., even for the case where it is shorted, there is a change of destruction.
(5) About the operation inside a strong electro-magnetic field
When using inside a strong electro-magnetic field, there is a possibility of error, so please be careful.
(6) Temperature Protect Circuit (TSD Circuit)
Temperature Protect Circuit (TSD Circuit) is built-in in this IC. As for the Temperature Protect Circuit (TSD Circuit),
because it a circuit that aims to block the IC from insistent careless runs, it is not aimed for protection and guarantee of
IC. Therefore, please do not assume the continuing use after operation of this circuit and the Temperature Protect
Circuit operation.
(7) About checking with Set boards
When doing examination with the set board, during connection of capacitor to the pin that has low impedance, there is a
possibility of stress in the IC, so for every 1 process, please make sure to do electric discharge. As a countermeasure
for static electricity, in the process of assembly, do grounding, and when transporting or storing please be careful. Also,
when doing connection to the jig in the examination process, please make sure to turn off the power supply, then
connect. After that, turn off the power supply then take it off.
(8) About common impedance
For the power supply and the wire of GND, lower the common impedance, then, as much as possible, make the ripple
smaller (as much as possible make the wire thick and short, and lower the ripple from L・C), etc. then and please
consider it sufficiently.
(9) In the application, when the mode where the VIN and each pin electrical potential becomes reversed exists, there is a
possibility that the internal circuit will become damaged. For example, during cases wherein the condition when charge
was given in the external capacitor, and the VIN was shorted to GND, it is recommended to insert the bypass diode to
the diode of the back current prevention in the VIN series or the middle of each Pin-VIN (fig.30).
(10) About IC Pin Input
This IC is a Monolithic IC, and between each element, it has P⁺ isolation for element separation and P board. With the N
layer of each element and this, the P-N junction is formed, and the parasitic element of each type is composed.
For example, like the fig.31, when resistor and transistor is connected to Pin,
○When GND＞(PinA) in Resistor, when GND＞(PinA), when GND＞(PinB) in Transistor (NPN),
the P-N junction will operate as a parasitic diode.
○Also, during GND＞(Pin B) in the Transistor (NPN), through the N layer of the other elements connected
to the above-mentioned parasitic diode , the parasitic NPN Transistor will operation.
On the composition of IC, depending on the electrical potential, the parasitic element will become necessary. Through
the operation of the parasitic element interference of circuit operation will arouse, and error, therefore destruction can be
caused. Therefore please be careful about the applying of voltage lower than the GND (P board) in I/O Pin, and the way
of using when parasitic element operating.
bypass di ode
avoi d r ever se
cur r ent di ode
VCC
Vcc
OUTPUT
Figure 30. Example of insert diode
r esi st or
( Pi n A)
NPN t r ansi st or
( Pi n B) _ï¼£
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P- subst r at e
ＧＮＤ
Par asi t i c
el ement
Ｐ^＋
ï¼®
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ï¼°
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P- subst r at e
ＧＮＤ
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Par asi t i c
el ement
Figure 31. Example of simple structure of Monolithic IC
( Pi n A)
Par asi t i c
el ement
ＧＮＤ
( Pi n B)
ＢＣ
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ＧＮＤ
Par asi t i c
el ement
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TSZ22111・15・001
18/19
TSZ02210-0Q3Q0AZ00160-1-2
2013.07.17 Rev.001