BR93G86-3A Datasheet, PDF (16/39 Pages) Rohm – Serial EEPROM series Standard EEPROM MicroWire BUS EEPROM (3-Wire)

BR93G86-3A
Datasheet
●Timing chart
1) Read cycle (READ)
～～
～～
～～
CS
*1
～～
SK
12
4
～～
n n+1
～～
Am: MSB of address
DI
DO
High-Z
*2
1 1 0 Am
～～
～ ～ ^{A1 A0}
～～
*2
～～
～～
0
Dx Dx-1
～ ～ ^{D1 D0 Dx Dx-1}
～～
Dx: MSB of data
n: required clocks
*1 Start bit
When data “1” is input for the first time after the rise of CS, this is recognized as a start bit. And when “1” is input after plural “0” are input, it is
recognized as a start bit, and the following operation is started. This is common to all the commands to described hereafter.
*2 For the meaning of Am,Dx,n,please see tables of command mode in Page15. For example, Am=A9,Dx=D15,n=29.
Figure 35. Read cycle
○When the read command is recognized, input address data (16bit) is output to serial. And at that moment, at taking A0,
in sync with the rise of SK, “0” (dummy bit) is output. And, the following data is output in sync
with the rise of SK.
This IC has an address auto increment function which is valid only at read command. This is the function where after the
above read execution, by continuously inputting SK clock, the above address data is read sequentially. And, during the
auto increment, keep CS at high.
2) Write cycle (WRITE)
CS
SK
12
4
DI
1 0 1 Am
～～
～～
～～
～ ～ ^{A1 A0 Dx Dx-1}
～～
tCS
～～
n
～～
～ ～ ^{D1 D0}
DO
High-Z
For the meaning of Am,Dx,n, please see tables of command mode in Page15.
～～
STATUS
～～
～～
～～
tSV
BU～ ～SY ^READY
tE/W
Am: MSB of address
Dx: MSB of data
n: required clocks
Figure 36. Write cycle
○In this command, input 16bit data are written to designated addresses (Am~A0). The actual write starts by the fall of CS
of D0 taken SK clock.
When STATUS is not detected (CS=low fixed),make sure Max 5ms time is in comforming with t_E/W.
When STATUS is detected (CS=high), all commands are not accepted for areas where low (BUSY) is output from DO,
therefore, do not input any command.
3) Write all cycyle (WRAL)
～～
～～
CS
tCS
～～
～～
SK
12
5
～～
n
～～
DI
1 000
1
～～
Dx Dx-1 _{～ ～} D1 D0
DO
High-Z
～～
～～
For the meaning of Dx,n,please see tables of command mode in Page15.
～～
STATUS
～～
～～
～～
tSV
BU～ ～SY ^READY
tE/W
Dx: MSB of data
n: required clocks
Figure 37. Write all cycle
○In this command, input 16bit data is written simultaneously to all adresses. Data is not written continuously per one word
but is written in bulk, the write time is only Max. 5ms in conformity with t_E/W.
In WRAL, STATUS can be detected in the same manner as in WRITE command.
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