BD9422EFV Datasheet, PDF (16/28 Pages) Rohm – White LED Driver for large LCD panel

BD9422EFV
Datasheet
●3.5 Setting of the external components.（typ. condition）
●3.5.1 Setting the LED current (VREF and Sx pin)
First, VREF pin voltage is determined. When performing Analog dimming, be careful of VREF pin input range (0.2 to 2.5V)
and decide typical voltage.
In BD9422EFV, LED constant current is controlled by Sx terminal voltage as a reference point. Sx terminal is controlled to
become one fifth of the voltage of VREF terminal voltage. In the case of VREF=1V, it is set to Sx=0.2V.
Therefore, when the resistance to Sx terminal versus GND is set to "RS", the relationship between RS, VREF and ILED is
as follows
R_S
[ohm] 
V_VREF [V ]
I _LED [ A] 5
REG9V=9V
●3.5.2 Setting the LED short detect voltage (LSP pin)
The voltage of LED short detection can be arbitrarily set up with LSP pin
LSP
COMP ₊
voltage.
LSP pin cannot be used by OPEN because of High Impedance. Please be
sure to applied voltage from the exterior. About LED short detection voltage,
-
if "VLEDshort" and LSP pin voltage are set to "VLSP", it is as follows.
R1
LSP
CLSP _R2
3200kΩ _LEDx
V_LSP
[V
]

VLED_short
5
[V
]
800kΩ
Figure20.
Since the setting range of a LSP pin is set to 0.8V to 3.0V, VLEDshort
can be set up in 4Vto15V.
○Equation of setting LSP detect Voltage
When the detection voltage VLSP of LSP is set up by resistance division of R1 and R2 using REG9V,
it becomes like the following formula.
VLED_short

 ^REG9V


R2
R1 R2



5
[V ]
*Also including the variation in IC, please also take the part variation in a set into consideration for an actual constant
setup, and inquire enough to it.
●3.5.3 Timer latch time(CP pin)
When various abnormalities are detected, the source current of 1.0uA is first flowed from CP pin.
BD9422EFV don’t stop by latch, unless abnormal state is continues and CP pin voltage reaches continues 2V.
With the capacity linked to CP pin, the unresponded time from detection to a latch stop. The relationship between the
unresponded time “Tcp” and CP pin connection capacitor “Ccp” is as follows.
C_CP
[F]

T_CP
[S]
 1.0  10^6[A]
2.0 [V]
●3.5.4 Setting the soft-start time (SS pin)
The starting time of a DCDC output is dependent on SS pin connection capacity.
Moreover, although SS pin is charged by source current of 1uA, IC does not perform LED protection as under DCDC
starting state until SS pin voltage arrive to 3.0V.
(The soft starting time set up here should be the mask time of a under [ starting ], and please keep in mind that it differs
from time until a DCDC output is stabilized.)
Time until a DCDC output is stabilized is greatly dependent on a ratio of step-up or load.
The relationship between soft starting time "TSS" and SS pin connection capacity "CSS" is as follows.
C_SS
[F]

T_SS
[S] 1.0 10^6 [A]
3.0 [V]
●3.5.5 DCDC operation frequency (RT pin)
The oscillation frequency of the DCDC output is decided by RT resistance.
BD9422EFV is designed to become a 500-kHz setup at the time of 30kohm.
RT resistance and frequency have a relation of an inverse proportion, and become settled as the following formula.
R_RT
 ^{1.5 1010} []
f _SW
f _sw =DCDC convertor oscillation frequency [Hz]
Please connect RT resistance close as much as possible from RT pin and an AGND pin.
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31.May.2013 Rev.003