BD9415FS Datasheet, PDF (14/34 Pages) Rohm – White LED Driver for 4Ch Large LCD Panels (DC/DC converter type)

BD9415FS
3.2.4 DCDC Oscillation Frequency Setting
RRT which connects to RT pin sets the oscillation frequency fSW of DCDC.
○Relationship between frequency fSW and RT resistance (ideal)
15000
R_RT  _{f SW [kHz]}
[k]　
【setting example】
When DCDC frequency fSW is set to 200kHz, RRT is as follows.
R_RT

15000 _
f_SW [kHz]
15000 _{ 75[k]　}
200[kHz]
Frequency (fsw)
RT
R_RT
GATE
CS
Rcs
GND
Figure 15. RT terminal setting example
3.2.5 UVLO Setting
Under Voltage Lockout pin is the input voltage of the power stage. IC starts boost
operation if UVLO is more than 2.5V(Typ) and stops if lower than 2.4V(Typ).
Since internal impedance exists in UVLO pin, cautions are needed for selection of
resistance for resistance division.
Vin detection voltage level can be calculated by the following formula using
resistance division of R1 and R2 (unit: kΩ).
Zin= 610 kΩ
(typ.)
1400k 530k
125k 480k
Vin
R1
UVLO
R2
1000pF
AGND AGND
○ Equation of Setting UVLO Release
Figure 16. UVLO setting example
Vin _DET

2.5 



R1 R2
R2



1
1400k 125k

530k
1

480k



R1_

[V ]　
○ Equation of Setting UVLO Lock
Vin_lock

2.4 



R1 R2
R2
 _
1
^{1400k 125k}

530k

1
480k

40k
 ^

R1_

[V ]　
*Also including the variation in IC, please also take the part variation in a set into consideration for an actual constant
setup, and inquire enough to it.
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TSZ02201-0F2F0C100140-1-2
23.May.2016 Rev.001