BD94121F Datasheet, PDF (14/28 Pages) Rohm – PFC Direct current resonance type White LED Driver for Large LCD

BD9412F
PIN.12 SS
This is soft start time and SDON time set up pin. Constant current 2.0µA(Typ) is charged to external capacitor
(0.01µF to 0.1µF). When SS terminal voltage is higher than 2.0V, COMPSD can be detected. When SS terminal
voltage is less than 2.0V, latch protection circuit will not operate. When SS terminal voltage is higher than 2.5V,
soft start completes. When soft start is under operation (SS pin voltage is less than 2.5V), timer latch protection
circuit by CP charge will not operate.
2 uA
ss
Css
POWER
ON
2.5V
2.0V
Finish
SoftStart
Start
COMPSD
Where:
CSS is the capacitance of SS pin
Figure. 23 SS Block Diagram
T_SSEND
C_SS

V_SSEND
I _SS

C_SS  2.5
2.0 10 ^6
 1.25 10 ⁶  C_SS
T_SDON
C_SS

V_SDON
I _SS

C_SS  2.0
2.0 10 ^6
 1.0 10 ⁶  C_SS
[sec]
[sec]
PIN.13 FAIL
This is fail signal output pin of IC. At normal situation, it outputs GND Level and it becomes Open after timer latch
in case any abnormality is detected. The pull up voltage during Open must be set less than rated voltage 5.5V of
FAIL pin. Please connect about 0.1uF capacitor for noise reduction to FAIL pin.
Condition
FAILOutput
Normal operation
GND Level
FAIL
Abnormal operation
Open
Figure. 24 FAIL Block Diagram
PIN.14 COMPSD
This is input pin for over voltage protection circuit comparator. The detection voltage of comparator is
4.0V(Typ),and will start to count 2CLK over voltage detection. After 2CLK count, it will shut down by timer latch.
PIN.15 PWM2DC
Pulse signal inputs to PWM2DC terminal and IC can average it by IC internal 100kΩ and the capacitor connected
to ADIM terminal (This means pulse to DC signal transfer circuit.). When the voltage that is higher than 8V(Typ)
forces to PWM2DC terminal, buffer output in the IC becomes high impedance, and IC function shifts to direct DC
input mode to ADIM. (Refer to the diagram of PIN11 ADIM.)
PIN.16 PGND
This is Power GND pin for output pin N1, N2 at driver part. Please make it independent from GND (Pin 3) pin on
inverter PCB. This pin is not connected to GND pin in IC inside.
PIN.17 N2
This is gate drive output pin for Low Side external Nch FET. Normally please connect it to FET gate through about
10Ω resistor. It is for noise reduction. Gate has to be pull-down to source by resistor of 1kΩ to 10kΩ.
PIN.18 N1
This is gate drive output pin for Low Side external Nch FET. Normally please connect it to FET gate through about
10Ω resistor. It is for noise reduction. Gate has to be pull-down to source by resistor of 1kΩ to 10kΩ.
www.rohm.com
© 2016 ROHM Co., Ltd. All rights reserved.
TSZ22111 • 15 • 001
14/24
TSZ02201-0F5F0C100100-1-2
22.Feb.2016 Rev.001