BD8311NUV_10 Datasheet, PDF (13/15 Pages) Rohm – High-efficiency Step-up Switching Regulator with Built-in Power MOSFET

BD8311NUV
Technical Note
●Notes for use
1) Absolute Maximum Rating
We dedicate much attention to the quality control of these products, however the possibility of deterioration or destruction
exists if the impressed voltage, operating temperature range, etc., exceed the absolute maximum ratings. In addition, it is
impossible to predict all destructive situations such as short-circuit modes, open circuit modes, etc. If a special mode
exceeding the absolute maximum rating is expected, please review matters and provide physical safety means such as
fuses, etc.
2) GND Potential
Keep the potential of the GND pin below the minimum potential at all times.
3) Thermal Design
Work out the thermal design with sufficient margin taking power dissipation (Pd) in the actual operation condition into account.
4) Short Circuit between Pins and Incorrect Mounting
Attention to IC direction or displacement is required when installing the IC on a PCB. If the IC is installed in the wrong way,
it may break. Also, the threat of destruction from short-circuits exists if foreign matter invades between outputs or the
output and GND of the power supply.
5) Operation under Strong Electromagnetic Field
Be careful of possible malfunctions under strong electromagnetic fields.
6) Common Impedance
When providing a power supply and GND wirings, show sufficient consideration for lowering common impedance and
reducing ripple (i.e., using thick short wiring, cutting ripple down by LC, etc.) as much as you can.
7) Thermal Protection Circuit (TSD Circuit)
This IC contains a thermal protection circuit (TSD circuit). The TSD circuit serves to shut off the IC from thermal runaway
and does not aim to protect or assure operation of the IC itself. Therefore, do not use the TSD circuit for continuous use or
operation after the circuit has tripped.
8) Rush Current at the Time of Power Activation
Be careful of the power supply coupling capacity and the width of the power supply and GND pattern wiring and routing since
rush current flows instantaneously at the time of power activation in the case of CMOS IC or ICs with multiple power supplies.
9) IC Terminal Input
This is a monolithic IC and has P+ isolation and a P substrate for element isolation between each element. P-N junctions
are formed and various parasitic elements are configured using these P layers and N layers of the individual elements.
For example, if a resistor and transistor are connected to a terminal as shown on Fig.36:
○The P-N junction operates as a parasitic diode
when GND > (Terminal A) in the case of a resistor or when GND > (Pin B) in the case of a transistor (NPN)
○Also, a parasitic NPN transistor operates using the N layer of another element adjacent to the previous diode in the
case of a transistor (NPN) when GND > (Pin B).
The parasitic element consequently rises under the potential relationship because of the IC’s structure. The parasitic
element pulls interference that could cause malfunctions or destruction out of the circuit. Therefore, use caution to avoid
the operation of parasitic elements caused by applying voltage to an input terminal lower than the GND (P board), etc.
(Pin A)
Resistor
(Pin B)
Transistor (NPN)
B
C
E
P^＋
N
P
N
P^＋
N
P^＋
ï¼®
N
P
N
GND
P^＋
N
P Substrate Parasitic Element
P Substrate
Parasitic Element
GND
(Pin A)
Parasitic Element
GND
Fig.36 Example of simple structure of Bipolar IC
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13/14
2010.11 - Rev.C