BD8966FVM Datasheet, PDF (12/15 Pages) Rohm – Low Noise High Efficiency Step-down Switching Regulator with Built-in Power MOSFET

BD8966FVM
Technical Note
●BD8966FVM Cautions on PC Board layout
VCC
RITH
③
CITH
1 _ADJ
2
VCC
3 _ITH
4
GND
EN ⁸
EN
7
PVCC
SW ⁶
L
5
CIN
Co
PGND
②
①
VOUT
Fig.32 Layout diagram
GND
① For the sections drawn with heavy line, use thick conductor pattern as short as possible.
② Lay out the input ceramic capacitor CIN closer to the pins PVCC and PGND, and the output capacitor Co closer to the
pin PGND.
③ Lay out CITH and RITH between the pins ITH and GND as near as possible with least necessary wiring.
●Recommended components Lists on above application
Symbol
Part
Value
Manufacturer
Series
L
Coil
4.7µH
Sumida
TDK
CMD6D11B
VLF5014AT-4R7M1R1
CIN Ceramic capacitor
10µF
Kyocera CM316X5R106K10A
CO Ceramic capacitor
10µF
Kyocera CM316X5R106K10A
CITH Ceramic capacitor
750pF
murata
GRM18series
VOUT=1.0V
18kΩ
ROHM
MCR10 1802
VOUT=1.2V
22kΩ
ROHM
MCR10 2202
RITH Resistance
VOUT=1.5V
22kΩ
ROHM
MCR10 2202
VOUT=1.8V
27kΩ
ROHM
MCR10 2702
VOUT=2.5V
36kΩ
ROHM
MCR10 3602
* The parts list presented above is an example of recommended parts. Although the parts are sound, actual circuit characteristics should be checked on
your application carefully before use. Be sure to allow sufficient margins to accommodate variations between external devices and this IC when
employing the depicted circuit with other circuit constants modified. Both static and transient characteristics should be considered in establishing these
margins. When switching noise is substantial and may impact the system, a low pass filter should be inserted between the VCC and PVCC pins, and a
schottky barrier diode established between the SW and PGND pins.
●I/O equivalence circuit
・EN pin
・SW pin
PVCC PVCC
PVCC
EN
SW
・ADJ pin
VCC
ADJ
10kΩ
・ITH pin
ITH
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Fig.33 I/O equivalence circuit
12/14
VCC
2009.05 - Rev.A