BU7861KN_10 Datasheet, PDF (10/14 Pages) Rohm – Mixer & Selector IC with PCM CODEC and 16bit D/A Converter

BU7861KN
●Input/output equivalent circuit figure
No
Terminal
name
I/O
Analog/
Digital
1
MICO
O Analog
2 MICIN_C O Analog
3 MICIN_1 I Analog
4 MICIN_2 I Analog
5 EXTGND O Analog
6
EXTIN
I Analog
7
AVDD
- Analog
8
AVSS
- Analog
9
SPOUT
O Analog
10
AIN_L
I Analog
11
AIN_R
I Analog
12 DACLO
I Analog
13 DACRO
I Analog
14
TEST
I Digital
15
RSTB
I Digital
16 LRCLK
I Digital
17
SDI
I Digital
18
BCLK
I Digital
19 SYSCLK I Digital
20
DVDD
- Digital
21
DVSS
- Digital
22 DSPCLK I Digital
23 DSPOUT O Digital
24 DSPIN
I Digital
25 FSYNC
I Digital
26 PLLLPF O Analog
27 AUDCLK I Digital
28 AUDCS
I
Digital
29 AUDTXD I Digital
30 AUDRXD O Digital
31
PVSS
- Analog
32
HP_LI
I Analog
33
HP_L
O Analog
34
HP_R
O Analog
35
HP_RI
I Analog
36
PVDD
- Analog
37
RECN
O Analog
38
RECP
O Analog
39 CSTEP O Analog
40
CPOP
O Analog
41 SMUTE O Analog
42 RXCOM O Analog
43 TXCOM O Analog
44 PVCOM O Analog
45 COMIN
I Analog
46 EXTOUT O Analog
47 MICB_1 O Analog
48 MICB_2 O Analog
Terminal function
MIC output
MIC Selection output
MIC1 input
MIC2 input
External ground
External input
Power source for analog
GND for analog
Speaker output
Melody input terminal Lch
Melody input terminal Rch
DAC Lch LPF Condenser connected terminal
DAC Rch LPF Condenser connected terminal
Please connect to DVSS
L:Reset input
LRCLK terminal 44.1kHz(fs) for DAC
SDI terminal for DAC
BCLK terminal 2.8224MHz(64fs) for DAC
SYSCLK terminal 11.2896MHz(256fs) for DAC
The power source for digital
GND for digital
PCMClock input for PCM signal
PCMsignal input
PCM signal input
8kHz The reference clock for PLL
Condenser connected terminal for PLL
CPU I/F clock input terminal
The chip selection terminal for CPU I/F (H active)
CPU I/FData input terminal
CPU I/FData output terminal
GND for Headphone and receiver
Lch head phone amplifier revision terminal in low limits
Lch Head phone amplifier output terminal
Rch Head phone amplifier output terminal
Rch head phone amplifier revision terminal in low limits
Power source for Headphone and receiver
Receiver output
Receiver output
Step noise decrease terminal when volume is variable
Pop sound decrease terminal
Constant terminal when soft mute
Receiving standard voltage output
Transmit standard voltage output
PATH standard voltage output
Standard voltage input terminal
External output
MIC BIAS output1
MIC BIAS output2
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10/13
Technical Note
Power
source
AVDD
AVDD
AVDD
AVDD
AVDD
-
-
AVDD
AVDD
AVDD
AVDD
AVDD
AVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
-
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
PVDD
PVDD
PVDD
PVDD
PVDD
-
PVDD
PVDD
AVDD
AVDD
AVDD
AVDD
AVDD
AVDD
AVDD
-
AVDD
AVDD
Circuit
figure
E
E
E
E
E
H
I
I
E
D
D
F
F
A
A
B
A
B
B
I
I
B
C
A
B
F
A
A
A
C
I
F
E
E
F
I
E
E
F
F
F
E
E
E
G
H
E
E
2010.09 - Rev.A