BU7839GVW_10 Datasheet, PDF (10/16 Pages) Rohm – Digital Input Class-D Headphone Amplifier

BU7839GVW
Technical Note
・Compound readout protocol
After internal address is specified, create the retransmission starting condition, change the data transmitting direction and
implement the readout. Subsequently, the data of the address that has been incremented is read out. As the readout of 1
byte after the address has become the final address, 00h is read out. The address is incremented after the transmission is
over. After retransmission starting condition, compound write is possible with R/W=0 (write in).
S 0 1 1 0 0 1 1 0 A A7 A6 A5 A4 A3 A2 A1 A0 A Sr 0 1 1 0 0 1 1 1 A
Device address
R/W=0 (White in)
Register address
Slave address
R/W=1(Read out)
D7 D6 D5 D4 D3 D2 D1 D0 A
D7 D6 D5 D4 D3 D2 D1 D0 A P
Data
Register address increment
Data
Register address increment
Transmitting set is on Master side
Transmitting set is on Slave side
A = Acknowledge
A = Non-acknowledge
S = START condition
P = STOP condition
Sr= Retransmission starting condition
・Timing diagram
(Repeated)
START condition
BIT 7
BIT 6
t SU;STA
t LOW t HIGH 1/f SCLK
Acknowledge STOP condition
SCL
SDA
t BUF t HD;STA
t SU;DAT t HD;DAT
t SU;STO
Ta=25 degree,DVDD=DVDDIO=1.8V, VDD_R=VDD_L=PLLVDD=3.0V
Item
Symbol
SCL clock frequency
Hold time of START condition
f_SCLK
t_HD;STA
Standard
mode
min max
0
100
4.0
-
High-speed
mode
Unit
min max
0
400 kHz
0.6
-
μs
"Ｌ" Level time of SCL
t_LOW
4.7
-
1.3
-
μs
"H" Level time of SCL
t_HIGH
4.0
-
0.6
-
μs
Setup time of repeated START condition
t_SU;STA
4.7
-
0.6
-
μs
Data hold time ※1
t_HD;DAT
0.1 3.45 0.1
0.9
μs
Data setup time
t_SU;DAT
250
-
100
-
ns
Setup time of STOP condition
t_SU;STO
4.0
-
0.6
-
μs
Bus opening time between STOP condition and START condition t_BUF
4.7
-
1.3
-
μs
*1 The maximum tHD;DAT is not allowed to exceed the “L” level time （tLOW） of SCL signal
www.rohm.com
© 2010 ROHM Co., Ltd. All rights reserved.
10/15
2010.05 - Rev.A