BU4836F-TR Datasheet, PDF (10/16 Pages) Rohm – Low Voltage Standard CMOS Voltage Detector ICs

BU48xx series BU49xx series
Datasheet
●Application Information
Explanation of Operation
For both the open drain type(Fig.12)and the CMOS output type(Fig.13), the detection and release voltages are used as
threshold voltages. When the voltage applied to the VDD pins reaches the applicable threshold voltage, the VOUT terminal
voltage switches from either “High” to “Low” or from “Low” to “High”. Because the BU48xx series uses an open drain output
type, it is possible to connect a pull-up resistor to VDD or another power supply [The output “High” voltage (VOUT) in this
case becomes VDD or the voltage of the other power supply].
VDD
VDD
VDD
R1
Vref
R2
R3
GND
VOUT
RL
RESET
R1
Vref
R2
Q1
R3
GND
Q2
VOUT RESET
Q1
Fig.12 (BU48xx type internal block diagram)
Fig.13 (BU49xx type internal block diagram)
Reference Data
Examples of Output rising value(tPLH)and Output falling value(tPHL)
Part Number
tPLH[µs]
tPHL[µs]
BU4845
23.3
275.9
BU4945
3.5
354.3
VDD=4.3V 5.1V
VDD=5.1V 4.3V
* This data is for reference only.
This figure will vary with the application, so please confirm actual operation conditions before use.
Timing Waveforms
Example:The following shows the relationship between the input voltage VDD, the CT Terminal Voltage VCT and the output
voltage VOUT when the input power supply voltage VDD is made to sweep up and sweep down (The circuits are those in
Fig.12 and 13).
①When the power supply is turned on, the output is unsettled
from after over the operating limit voltage (VOPL) until tPHL.
VDD
Therefore it is possible that the reset signal is not outputted
VDET+ΔVDET
VDET
when the rise time of VDD is faster than tPHL.
⑤
②When VDD is greater than VOPL but less than the reset release
voltage (VDET + VDET), output (VOUT) voltages will switch to L.
VOPL
0V
③If VDD exceeds the reset release voltage (VDET + VDET), then
VOUT switches from L to H (with a delay of tPLH).
VOUT
④If VDD drops below the detection voltage (VDET) when the
power supply is powered down or when there is a power
VOH
supply fluctuation, VOUT switches to L (with a delay of tPHL).
tPHL
tPLH
tPLH
⑤The potential deference between the detection voltage and the
VOL
tPHL
release voltage is known as the hysteresis width (VDET). The
system is designed such that the output does not flip-flop with
power supply fluctuations within this hysteresis width,
①②③ ④
preventing malfunctions due to noise.
Fig.14 Timing Waveforms
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TSZ22111・15・001
10/13
TSZ02201-0R7R0G300060-1-2
22.May.2013 Rev.008