BD8152FVM_1 Datasheet, PDF (10/18 Pages) Rohm – High-efficiency Step-up Switching Regulators with Built-in Power MOSFET

BD8152FVM, BD8158FVM
Technical Note
(9)Setting RC, CC of the phase compensation circuit
In the current mode control, since the coil current is controlled, a pole (phase lag) made by the CR filter composed of the
output capacitor and load resistor will be created in the low frequency range, and a zero (phase lead) by the output
capacitor and ESR of capacitor will be created in the high frequency range. In this case, to cancel the pole of the power
amplifier, it is easy to compensate by adding the zero point with CC and RC to the output from the error amp as shown in
the illustration.
Open loop gain
A
Gain 0
【dB】
0
Phase
【deg】 _-90
fp(Min)
fp(Max)
lOUTMin
lOUTMax
fz(ESR)
Error amp phase compensation
A
Gain
【dB】
0
Phase ⁰
【deg】_-90
Fig. 28 Gain vs Phase
L
fp =
1
[Hz]
2  RO  CO
fz (ESR) =
1
2  ESR  CO
[Hz]
Pole at the power amplification stage
When the output current reduces, the load resistance
Ro increases and the pole frequency lowers.
fp (Min) =
1
2  ROMax  CO
[Hz]  At light-load
fz (Max) =
1
2  ROMin  CO
[Hz]  At heavy-load
Zero at the power amplification stage
When the output capacitor is set larger, the pole
frequency lowers but the zero frequency will not
change. (This is because the capacitor ESR
becomes 1/2 when the capacitor becomes 2 times.)
fp (Amp.) =
1
[Hz]
2  Rc  Cc
Vo
VCC
Cin
Rc
Cc
Vcc,PVcc
COMP
SW
GND,PGND
ESR
Ro
Co
Fig. 29 Application Circuit Diagram
It is possible to realize the stable feedback loop by canceling the pole fp (Min.), which is created by the output capacitor
and load resistor, with CR zero compensation of the error amp as shown below.
fz (Amp.) = fp (Min.)
1
1
2  Rc  Cc
=
2  Romax  Co
[Hz]
As the setting range for the resistor, 1 kΩ to 10 kΩ is recommended. When the resistor is set to 1 kΩ or lower, the
effect by phase compensation becomes low and it may cause the oscillation of output voltage. When it is set to 10 kΩ or
larger, the COMP pin becomes Hi-Z and the switching noise becomes easy to superpose. Therefore the stable switching
pulse cannot be generated and the irregular ripple voltage may be generated on the output voltage.
As the setting range for the capacitance, 3,300 pF to 10,000 pF is recommended. When the capacitance is set to 3,300
pF or lower, the irregular ripple voltage may be generated on the output voltage due to the effect of switching noise. When
it is set to 10,000 pF or larger, the response becomes worse and the output voltage fluctuation becomes large.
Accordingly it may require the output capacitor which is larger than the necessary value.
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10/17
2010.03 - Rev.B