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ML620Q503 Datasheet, PDF (1/34 Pages) Rohm – Ultra Low Power 16-bit Microcontroller | |||
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ML620Q503/Q504
Ultra Low Power 16-bit Microcontroller
FEDL620Q504-01
Issue Date: Mar. 13, 2015
GENERAL DESCRIPTION
This LSI family is a high-performance 16-bit CMOS microcontroller into which rich peripheral circuits, such as
synchronous serial port, UART, I2C bus interface (master), supply voltage level detect circuit, RC oscillation
type A/D converter, and successive approximation type A/D converter are incorporated around 16-bit CPU
nX-U16/100.
The CPU nX-U16/100 is capable of efficient instruction execution in 1-instruction 1-clock mode by 3-stage pipe
line architecture parallel processing. The Flash ROM that is installed as program memory achieves low-voltage
low-power consumption operation (read operation) is most suitable for battery-driven applications. And, this LSI
has a data flash-memory fill area by a software which can be written in.
The on-chip debug function that is installed enables program debugging and programming.
FEATURES
⢠CPU
â 16-bit RISC CPU (CPU name: nX-U16/100)
â Instruction system: 16-bit instructions
â Instruction set: Transfer, arithmetic operations, comparison, logic operations, multiplication/division,
bit manipulations, bit logic operations, jump, conditional jump, call return stack
manipulations, arithmetic shift, and so on
â Build-in On-Chip debug function
â Minimum instruction execution time
30.5 µs (@32.768 kHz system clock)
62.5ns (@16 MHz system clock)
⢠Built-in coprocessor for multiplication, division, and multiply-accumulate operations
â Signed or unsigned operation setting
â Multiplication: 16bit à 16bit (operation time 4 cycles)
â Division: 32bit / 16bit (operation time 8 cycles)
â Division: 32bit / 32bit (operation time 16 cycles)
â Multiply-accumulate (non-saturating): 16bit à 16bit + 32bit (operation time 4 cycles)
â Multiply-accumulate (saturating): 16bit à 16bit + 32bit (operation time 4 cycles)
⢠Internal memory
â Supports ISP function (re-writing the program memory area by software)
â Number of segments
Product name
Flash memory
Program area*
Data area
ML620Q503
32KB (16K Ã 16bit)
2KB (1K Ã 16bit)
ML620Q504
64KB (32K Ã 16bit)
2KB (1K Ã 16bit)
*: including 1KB of unusable test area
SRAM
2KB (1K Ã 16bit)
6KB (3K Ã 16bit)
⢠Interrupt controller (INTC)
â 1 non-maskable interrupt sources (Internal source: 1)
â 37 maskable interrupt sources (Internal sources: 29, External sources: 8)
â Software interrupt (SWI): maximum 64 sources
â External interrupts and comparator allow edge selection and sampling selection
â Priority level (4-level) can be set for each interrupt
⢠Time base counter (TBC)
â Low-speed time base counter Ã1 channel
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