DS9746 Datasheet, PDF (8/10 Pages) Richtek Technology Corporation – VBUS OVP with a PTVS Diode

RT9746
Application Information
Power Up
The RT9746 has a threshold of 2.7V power on reset (POR)
with a built-in hysteresis of 100mV. Before the input voltage
reaches the POR threshold, the RT9746 is off. When the
input voltage is over the POR threshold, the VOUT of
RT9746 will delay for 32ms which includes soft-start time
of 8ms. The 32ms delay allows the transient at the input
during a hot insertion of the power supply to settle down
before the IC starts to operate. During the soft-start
transition, the RT9746 slowly turns on the internal
MOSFET to reduce the inrush current.
Over Temperature Protection (OTP)
The RT9746 monitors its internal temperature to prevent
thermal failures. The chip turns off the MOSFET when
the junction temperature reaches 160°C. The IC will
resume after the junction temperature is cooled down
20°C.
Input Over-Voltage Protection
The RT9746 provides input over-voltage protection via
internal or external resistor to set OVP level. If OVPFB is
connected to GND, the RT9746 uses the internal OVP
level setting. If an external resistor-divider is connected to
OVPFB and V_OVPFB exceeds the VOVP_SEL voltage, the
RT9746 will adopt external OVP level setting. The OVP
level VOVP is set as below.
V_OVP
=
V_{REF_EXT}
x
₁₊
R2
R1


When the input volatge exceeds the OVP level, the RT9746
will turn off internal MOSFET around 0.18us to prevent
the high input volatge from damaging the end system.
When the input volatge returns to normal operation volatge
range with hysteresis (internal 150mV, external 100mV),
the RT9746 will turn on the MOSFET to re-enable output.
Over-Current Protection (OCP)
The RT9746 monitors the output current to prevent the
output short or the charging of the battery with an excessive
current. The RT9746 has a built-in 180μs delay time to
prevent any transient noise triggering the OCP. If the OCP
situation keeps for 180μs, the internal MOSFET will be
turned off.
Thermal Considerations
For continuous operation, do not exceed absolute
maximum junction temperature. The maximum power
dissipation depends on the thermal resistance of the IC
package, PCB layout, rate of surrounding airflow, and
difference between junction and ambient temperature. The
maximum power dissipation can be calculated by the
following formula :
P_D(MAX) = (T_J(MAX) − T_A) / θ_JA
where T_J(MAX) is the maximum junction temperature, T_A is
the ambient temperature, and θ_JA is the junction to ambient
thermal resistance.
For recommended operating condition specifications, the
maximum junction temperature is 125°C. The junction to
ambient thermal resistance, θ_JA, is layout dependent. For
WL-CSP-12B 1.92x1.27 (BSC) package, the thermal
resistance, θ_JA, is 59.6°C/W on a standard JEDEC 51-7
four-layer thermal test board. The maximum power
dissipation at T_A = 25°C can be calculated by the following
formula :
P_D(MAX) = (125°C − 25°C) / (59.6°C/W) = 1.67W for
WL-CSP-12B 1.92x1.27 (BSC) package
The maximum power dissipation depends on the operating
ambient temperature for fixed T_J(MAX) and thermal
resistance, θ_JA. The derating curve in Figure 1 allows the
designer to see the effect of rising ambient temperature
on the maximum power dissipation.
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DS9746-00 March 2016