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RT8876A Datasheet, PDF (41/50 Pages) Richtek Technology Corporation – Dual Channel PWM Controller with 3/2/1 Phase for CORE VR and Single Phase for AXG VR
RT8876A
or the DCR of the inductor), and RDROOP is the equivalent
load line resistance as well as the desired static output
impedance. Since the DCR of the inductor is temperature
dependent, the output accuracy may be affected at high
temperature conditions. Temperature compensation is
recommended for the lossless inductor DCR current sense
method. Figure 20 shows a simple but effective way of
compensating the temperature variations of the sense
resistor by using an NTC thermistor placed in the feedback
path.
C2
C1
COMPA
FBA
EA-
RGNDA
+
VDAC,AXG
R2 R1b R1a
RNTC
VSSAXG_SENSE
VCCAXG_SENSE
Figure 20. AXG VR : Loop Setting with Temperature
Compensation
Usually, R1a is set to equal RNTC (25°C) and R1b is selected
to linearize the NTC's temperature characteristic. For a
given NTC, the design procedure is to get R1b and R2
first, and then C1 and C2 next. According to equation (35),
to compensate the temperature variations of the sense
resistor, the error amplifier gain (AV) should have the same
temperature coefficient as RSENSE. Hence :
A V, HOT = RSENSE, HOT
A V, COLD RSENSE, COLD
(36)
From (33), Av can be obtained at any temperature (T°C)
as :
A V, T°C
=
R2
R1a // RNTC, T°C
+ R1b
(37)
The standard formula for the resistance of NTC thermistor
as a function of temperature is given by :
{ ( ) ( ) } RNTC, T°C
= R25°C
e β⎡⎢⎣
1
T+273
−
1⎤
298 ⎥⎦
(38)
where R25°C is the thermistor's nominal resistance at room
temperature, β is the thermistor's material constant in
Kelvins, and T is the thermistor actual temperature in
Celsius. To calculate DCR value at different temperatures,
use the equation below :
DCRT°C = DCR25°C x [1+ 0.00393 x (T − 25)]
(39)
where 0.00393 is the temperature coefficient of copper.
For a given NTC thermistor, solving equation (37) at room
temperature (25°C) yields
R2 = AV, 25°C x (R1b + R1a // RNTC, 25°C)
(40)
where AV, 25°C is the error amplifier gain at room temperature
and can be obtained from equation (35). R1b can be
obtained by substituting (40) to (36),
R1b =
RSENSE, HOT
RSENSE, COLD
×
(R1a
//
RNTC,
HOT
)
−
(R1a
//
RNTC,
COLD
)
⎛⎜1−
⎝
RSENSE, HOT
RSENSE, COLD
⎞
⎟
⎠
(41)
Loop Compensation
Optimized compensation of the AXG VR allows for best
possible load step response of the regulator's output. A
type-I compensator with one pole and one zero is adequate
for a proper compensation. Figure 20 shows the
compensation circuit. Previous design procedure shows
how to select the resistive feedback components for the
error amplifier gain. Next, C1 and C2 must be calculated
for compensation. The target is to achieve constant
resistive output impedance over the widest possible
frequency range.
The pole frequency of the compensator must be set to
compensate the output capacitor ESR zero :
fP
=
1
2 × π × C × RC
(42)
where C is the capacitance of output capacitor, and RC is
the ESR of output capacitor. C2 can be calculated as
below :
C2 = C × RC
(43)
R2
The zero of compensator has to be placed at half of the
switching frequency to filter the switching related noise.
Such that,
( ) C1 =
1
R1b + R1a // RNTC, 25°C × π × fSW
(44)
TON Setting
High frequency operation optimizes the application by
allowing smaller component size, but with the trade-off of
efficiency due to higher switching losses. This may be
acceptable in ultra portable devices where the load currents
Copyright ©2012 Richtek Technology Corporation. All rights reserved.
DS8876A-02 October 2012
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
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