RT5028E Datasheet, PDF (34/41 Pages) Richtek Technology Corporation – Integrated PMIC

RT5028E
Table 3. I²C to MTP Mapping Table
MTP Page-1
MTP
Address
I²C Register Address
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
Function
BUCKcontrol1
Meaning
Buck1Output[5:0]
Buck1VRC
0X00 0X01
Default
0
0
1
1
1
0
0
0
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset Condition A
A
A
A
A
A
B
B
Function
BUCKcontrol2
Meaning
Buck2Output[5:0]
Buck2VRC
0X01 0X02
Default
1
0
0
0
0
1
0
0
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset Condition A
A
A
A
A
A
B
B
Function
BUCKcontrol3
Meaning
Buck3Output[5:0]
Buck3VRC
0X02 0X03
Default
0
0
1
0
0
0
0
0
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset Condition A
A
A
A
A
A
B
B
Function
BUCKcontrol4
Meaning
Buck4Output[5:0]
Buck4VRC
0X03 0X04
Default
1
1
0
1
0
0
0
0
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset Condition A
A
A
A
A
A
B
B
Function
VRC Control
0X0D 0X05
Meaning
Default
Buck1V Buck2V Buck3V
RC_EN RC_EN RC_EN
Buck4V
RC_EN
Reserved
Reserved
Reserved
Reserved
0
0
0
0
0
0
0
0
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
B
B
B
B
B
B
B
B
Condition
Function
LDOcontrol1
Meaning Reserved
LDO1OUT[6:0]
0X04 0X07
Default
0
0
0
0
1
0
0
0
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset Condition B
A
A
A
A
A
A
A
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DS5028E-00 October 2016