RT5045A Datasheet, PDF (26/51 Pages) Richtek Technology Corporation – Power Management Unit Total Power Solution for SSD

RT5045A
Table 14. CH6_SEL_REG
Address : 0x0C
Description : CH6 VID setting register.
CH5 VID setting and power on/off status and control.
Bits
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
Name
Reserved
SEL
Reserved
Reset Value
0
0
0
0
0
0
0
0
Read/Write
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Bits
7
6:2
1:0
Name
Reserved
SEL
Reserved
Description
Reserved bit
Supply voltage,
SEL[6:2] = 00000 : 0.7V
SEL[6:2] = 1 : 0.725V
SEL[6:2] = 10 : 0.75V
SEL[6:2] = 11 : 0.775V
SEL[6:2] = 100 : 0.8V
SEL[6:2] = 101 : 0.825V
SEL[6:2] = 110 : 0.85V
SEL[6:2] = 111 : 0.875V
SEL[6:2] = 1000 : 0.9V
SEL[6:2] = 1001 : 0.925V
SEL[6:2] = 1010 : 0.95V
SEL[6:2] = 1011 : 0.975V
SEL[6:2] = 1100 : 1V
SEL[6:2] = 1110 : 1.05V
SEL[6:2] = 1111 : 1.075V
SEL[6:2] = 10000 : 1.1V
SEL[6:2] = 10001 : 1.125V
SEL[6:2] = 10010 : 1.15V
SEL[6:2] = 10011 : 1.175V
SEL[6:2] = 10100 : 1.2V
SEL[6:2] = 10101 : 1.225V
SEL[6:2] = 10110 : 1.25V
SEL[6:2] = 10111 : 1.275V
SEL[6:2] = 11000 to 11111 : 1.3V
VOUT = SEL[6:2] x 0.025V + 0.7V, from SEL[6:2] = 0 to 18 (hex)
(After each UVLO rising, the voltage is set to the value by VSEL0/VSEL1 setting :
VSEL0 = 0, VSEL1 = 0, VOUT = 1.0V
VSEL0 = 0, VSEL1 = 1, VOUT = 1.0V
VSEL0 = 1, VSEL1 = 0, VOUT = 0.9V
VSEL0 = 1, VSEL1 = 1, VOUT = 0.9V)
Reserved bit
Copyright © 2015 Richtek Technology Corporation. All rights reserved.
www.richtek.com
26
is a registered trademark of Richtek Technology Corporation.
DS5045A-00 March 2015