RT8207GQW Datasheet, PDF (20/22 Pages) Richtek Technology Corporation – Complete DDRII/DDRIII Memory Power Supply Controller

RT8207
Organic semiconductor capacitor(s) or specialty polymer
capacitor(s) are recommended.
For low input-to-output voltage differentials (VIN/VDDQ
< 2), additional output capacitance is required to maintain
stability and good efficiency in ultrasonic mode.
The amount of overshoot due to stored inductor energy
can be calculated as :
V_SOAR
=
(I_PEAK )² × L
2 × C_OUT × V_DDQ
where I_PEAK is the peak inductor current.
Output Capacitor Stability
Stability is determined by the value of the ESR zero relative
to the switching frequency. The point of instability is given
by the following equation :
f_ESR
=
1
2 × π × ESR × C_OUT
≤
f_SW
4
Do not put high-value ceramic capacitors directly across
the outputs without taking precautions to ensure stability.
Large ceramic capacitors can have a high- ESR zero
frequency and cause erratic, unstable operation. However,
it is easy to add enough series resistance by placing the
capacitors a couple of inches downstream from the
inductor and connecting VDDQ or the FB divider close to
the inductor.
Unstable operation manifests itself in two related and
distinctly different ways: double-pulsing and feedback loop
instability.
Double-pulsing occurs due to noise on the output or
because the ESR is so low that there is not enough voltage
ramp in the output voltage signal. This “fools” the error
comparator into triggering a new cycle immediately after
the 400ns minimum off-time period has expired. Double-
pulsing is more annoying than harmful, resulting in nothing
worse than increased output ripple. However, it may
indicate the possible presence of loop instability, which
is caused by insufficient ESR.
Loop instability can result in oscillations at the output
after line or load perturbations that can trip the over-voltage
protection latch or cause the output voltage to fall below
the tolerance limit.
The easiest method for checking stability is to apply a
very fast zero-to-max load transient and carefully observe
the output-voltage-ripple envelope for overshoot and ringing.
It helps to simultaneously monitor the inductor current
with an AC current probe. Do not allow more than one
cycle of ringing after the initial step-response under- or
over-shoot.
Thermal Considerations
For continuous operation, do not exceed absolute
maximum operation junction temperature. The maximum
power dissipation depends on the thermal resistance of
IC package, PCB layout, the rate of surroundings airflow
and temperature difference between junction to ambient.
The maximum power dissipation can be calculated by
following formula :
P_D(MAX) = ( T_J(MAX) - T_A ) / θ_JA
Where T_J(MAX) is the maximum operation junction
temperature, T_A is the ambient temperature and the θ_JA is
the junction to ambient thermal resistance.
For recommended operating conditions specification of
RT8207, the maximum junction temperature is 125°C. The
junction to ambient thermal resistance θ_JA is layout
dependent. For WQFN-24L 4x4 packages, the thermal
resistance θ_JA is 54°C/W on the standard JEDEC 51-7
four layers thermal test board. The maximum power
dissipation at T_A = 25°C can be calculated by following
formula :
P_D(MAX) = (125°C − 25°C) / (52°C/W) = 1.923W for
WQFN-24L 4x4 packages
The maximum power dissipation depends on operating
ambient temperature for fixed T_J(MAX) and thermal
resistance θ_JA. For RT8207 packages, the Figure 5 of
derating curves allows the designer to see the effect of
rising ambient temperature on the maximum power
allowed.
www.richtek.com
20
DS8207-07 March 2011