RT6236A Datasheet, PDF (20/22 Pages) Richtek Technology Corporation – ACOT Synchronous Step-Down Converter

RT6236A/B
θ_JA, is 64.8°C/W on a standard four-layer thermal test
board. The maximum power dissipation at T_A = 25°C can
be calculated by the following formula :
P_D(MAX) = (125°C − 25°C) / (64.8°C/W) = 1.54W for
UQFN-13JL 2x3 (FC) package
The maximum power dissipation depends on the operating
ambient temperature for fixed T_J(MAX) and thermal
resistance, θ_JA. The derating curve in Figure 7 allows the
designer to see the effect of rising ambient temperature
on the maximum power dissipation.
2.4
Four-Layer PCB
2.0
1.6
1.2
0.8
0.4
0.0
0
25
50
75
100
125
Ambient Temperature (°C)
Figure 7. Derating Curve of Maximum Power Dissipation
Layout Consideration
 Follow the PCB layout guidelines for optimal
performance of the device.
 Keep the traces of the main current paths as short and
wide as possible.
 Put the input capacitor as close as possible to VIN and
VIN pins.
 SW node is with high frequency voltage swing and
should be kept at small area. Keep analog components
away from the SW node to prevent stray capacitive noise
pickup.
 Connect feedback network behind the output capacitors.
Keep the loop area small. Place the feedback
components near the device.
 Connect all analog grounds to common node and then
connect the common node to the power ground behind
the output capacitors.
 An example of PCB layout guide is shown in Figure 8
for reference.
SW should be connected to inductor by
wide and short trace, and keep sensitive
components away from this trace.
V_OUT
L
C_BOOT
Place the input and output capacitors
as close to the IC as possible.
GND
Place the feedback as
close to the IC as possible.
C_OUT
13 12 11
C_IN
GND 1
10 VIN
R1
EN 2
9 VIN
FB 3
8 PGOOD
R2 ^{NC 4}
56
7 NC
C_SS
GND
C_PVCC
Figure 8. PCB Layout Guide
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is a registered trademark of Richtek Technology Corporation.
DS6236A/B-02 August 2016