RT9603_07 Datasheet, PDF (2/10 Pages) Richtek Technology Corporation – Synchronous-Rectified Buck MOSFET Drivers

RT9603
Typical Application Circuit
+12V
R1
10
C1
1uF
PWM
INPUT
+12V
D1
1N4148
1
C3
C4
1uF
1000uF/16V
4 _VCC ^BST
C2
1uF
3 _NC
DRVH ⁸
7
SW
Q1
PHB83N03LT
L1
2uH
2 _VIN
DRVL ⁵
Q2
PGND
6
PHB95N03LT
R2
2.4K
R3
2.4K
C5
x1500uF
V_CORE
C6
x1500uF
ISPx
ISNx
Note: The traces that run from the controller ISPx and ISNx pins, should be run together next to each other and Kelvin connected
to the Q2. Place both R2 and R3 as close to the PWM Controller as possible.
Functional Pin Description
Pin No. Pin Name
Pin Function
Floating bootstrap supply pin for the upper gate drive. Connect the bootstrap capacitor
1
BST between this pin and the SW pin. The bootstrap capacitor provides the charge to turn
on the upper MOSFET.
Accepts a logic control signal. Connect this pin to the PWM output of the controller.
2
VIN
If the PWM signal enters and remains within the shutdown window, the output drivers are
disabled and both MOSFET gates are pulled and held low.
3
NC
No Internal Connection.
4
VCC Supply Input. Connect to +12V supply. Place a bypass capacitor from this pin to PGND.
5
DRVL Lower gate drive output. Should be connected to the lower MOSFET gate.
6
PGND Common Ground.
Upper driver return. Should be connected to the common node of upper and lower
7
SW
MOSFETs. The SW voltage is monitored for adaptive shoot-through protection.
8
DRVH Upper gate drive output. Should be connected to the upper MOSFET gate.
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2
DS9603-08 March 2007