English
Language : 

RT9245C Datasheet, PDF (18/25 Pages) Richtek Technology Corporation – Multi-Phase PWM Controller for CPU Core Power Supply
RT9245C
PGOOD Function
During start-up, RT9245C will detect 5VCC and 12VIN
(through DVD pin). In Figure 21, 5VCC or 12VIN is not ready
during T1. V(SS) (in Figure 20) is pulled to GND by FAULT.
V(EAP) is also equal to GND. V(FB) and VOUT will try to
follow V(EAP) thus both V(FB) and VOUT are equal to GND
during T1. During T2, both 5VCC and 12VIN are ready,
FAULT = low, OPSS starts charging up CSS. In the design
of RT9245C, ISS (the maximal current sink and source
capability of OPSS) is limited and time-variant. During T2
(V1 = 0.4V > V(SS) > 0), ISS(T2) is equal to about 10uA.
T2 = CSS x V1 ≅ 4x104 x CSS
ISS(T2)
After V(SS) > V1, ISS changes to about 20uA. The rising
speed of V(SS) becomes about 2 times faster than in T1.
In Figure 20, MOSFET N1 will turn on only if V(SS) > VTH_N1
(threshold voltage of N1) ≅ 0.7V = V2. Before N1 turns
on, V(EAP) is still 0V.
T3 = CSS x (V2 - V1) ≅ 1.5x104 x CSS
ISS(T3)
After V(SS) > V2, MOSFET N1 turns on, V(EAP) starts rising.
ISS(T4) is still equal to about 20uA. V(SS,EAP) is equal to
VTH_N1. Due to the body effect of MOSFET N1, VTH_N1
increases with higher V(EAP). For example, if VOUT target
is 1.4V, V(SS,EAP) will be equal to about 0.7V at the
beginning of T4 and equal to about 1.1V at the end of T4.
T4 = CSS x (V4 - V2) ≅ 9x104 x CSS
ISS(T4)
At the end of T4, VOUT is very close to the target (within
the range of ±40mV). An internal 1ms timer starts. After
about 1ms(T5), The open-drain output PGOOD releases.
After PGOOD releases, ISS(T6) becomes about 320uA to
accelerate OPSS. RT9245C enters normal operation mode
and is capable to follow VID on the fly.
When any of the fault conditions happens, V(SS) and
PGOOD will be pulled low immediately. If the fault condition
is one of 5VCC low, DVD low, OC or VID_OFF, RT9245C
will try to turn off both high side MOSFET and low side
MOSFET. VOUT will fall slowly to avoid negative VOUT. The
typical waveform is shown in Figure 22.
www.richtek.com
18
If the fault condition is OV, V(SS) and PGOOD will be pulled
low immediately also. RT9245C will try to turn on low
side MOSFET and turn off high side MOSFET. VOUT will
fall quickly to protect CPU from high voltage. The typical
waveform is shown in Figure 23.
VOUT
5VCC
VDAC
Z1
OPSS
+
-
Z2
FB -
+EA
EAP
N1
COMP
FAULT
SS
CSS
Figure 20. Soft Start Circuit
5VCC_ready
and DVD_ready
PGOOD
V4
V(SS)
V3
V2
V1
T1
VOUT
T2
T3
T4
T5
T6
Figure 21. Soft Start Waveform
PGOOD
V(SS)
VOUT
5VCC_Low + DVD_Low + OC + VID_OFF
Figure 22. Waveform for 5VCC_Low, DVD_Low, OC or
VID_OFF
DS9245C-02 March 2007