RT9256 Datasheet, PDF (17/18 Pages) Richtek Technology Corporation – Actively Alternative Mode Two-Phase / Dual Switching PWM Controller

Preliminary
RT9256
Pole
Add type three compensation
Zero
Original type two compensation
Figure 11. AC Response Curve of Type Two and Three
C2
C1
R2
C3 _R3
V_IN
-
+
R1
V_OUT
Figure 12. Type Three Compensation Network
Type three compensation can also be done as shown in
Figure 12. It has a pole at the origin, two poles, and two
zeros.
Zero : FZ1 =
1
; FZ2 =
1
2π x R2 x C1
2π x [R1+ R3] x C3
Poles : FP1 =
1
; FP2 =
1
2π x R2 x C1x C2
2π x R3 x C3
With small value of R3 and proper chosen poles-zeros,
the gain boost will be less limited and obvious than that of
the first kind of type three compensation.
Protection
V_IN detection
The V_IN detection circuitry monitors the switching power
source when power up. As V_IN > 1.8V, RR pin is enable for
ramp setting and the chip is in ramp setting mode. The
voltage at RR pin will be about 0.55V. Otherwise, the chip
will be in V_IN detection mode and RR pin is disable for
ramp setting until V_IN > 1.8V. In V_IN detection mode, the
UGATE and LGATE will be off and SS will be pulled low by
a constant current of 10uA. The chip will enter the ramp
setting mode and SS will re-softstart when V_IN > 1.8V. In
two switcher mode, the detection function work
independently. In two phase mode, ramp setting mode will
be activated when both channel’ s V_IN are ready.
DS9256-07 August 2007
OCP
The RT9256 use cycle by cycle current comparison. The
over current level is set by IMAX pin. When OC function
occurs and SS > VCC5 − 1.3, a constant current of 10uA
starts to discharge the capacitor connected to SS pin right
away. When OC occurs UGATE and LGATE will be off.
When the voltage at the capacitor connected to SS pin
pass about 0.4V, a constant current of 10uA starts to charge
the capacitor. The PWM signal is enable to pass to the
UGATE and LGATE. In two switcher mode, OCP function
is independent monitoring. OCP function in two phase
mode monitors both channels, either one can activate OCP.
If the OC protection occurs three times, OCSD will be
activated and shut down the chip.
RT9256 uses an external resistor R_IMAX to set a programm-
able over current trip point. OCP comparator compares
each inductor current with this reference current. RT9256
uses hiccup mode to eliminate fault detection of OCP or
reduce output current when output is shorted to ground.
V_IMAX
R_IMAX
⇔ I_X
=
DCR ×I_L
R_CSN
+
V_CSN
R_DC
OCP comparator
IMAX
+
I_X
-
Figure 13
UVP
By detecting voltage at FB pin when SS > VCC5 − 1.3. If
FB < 0.6, the chip will enter the V_IN detection mode. In V_IN
detection mode, the UGATE and LGATE will be off and SS
will be pulled low by a constant current of 10uA. A constant
current oh 10uA starts to charge capacitor at SS pin when
SS pass 0.4V.
In two switcher mode, the detection function work
independently. In two phase mode, ramp setting mode will
be activated when both channel are ready.
OTP
Monitor the temperature near the driver part within the chip.
Shutdown the chip when OTP.
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