RT9244 Datasheet, PDF (12/15 Pages) Richtek Technology Corporation – Multi-Phase PWM Controller for CPU Core Power Supply

RT9244
Design Example
Given:
Apply for three phase converter
V_IN = 12V
V_CORE = 1.5V
I_{LOAD (MAX)} = 60A
V_DROOP = 120mV at full load
OCP trip point set at 33A for each channel (S/H)
R_DS(ON) = 6mΩ of low side MOSFET at 27°C
L = 2μH
C_OUT = 9,000μF with 2mΩ ESR.
1. Compensation Setting
a. Modulator Gain, Pole and Zero :
From the following formula :
V IN
12V
Modulator Gain =
V RAMP
= _{1.9V× 3}
= 4.2 (12.46dB)
2
where V_RAMP : ramp amplitude of sawtooth wave
1
LC Filter Pole = _{2π x LC} = 1.2kHz and
1
ESR Zero = _{2π x ESR x COUT} = 8.8kHz
b. EA Compensation Network :
Select R1 = 2.4kΩ, R2 = 24kΩ, C1 = 6.6nF,
C2 = 33pF and use the type 2 compensation
scheme shown in Figure 5.
R2 ^C1
R3 ^C3
COMP
C2
R1
> VDIF
-
+
DACOUT
FB
R3,C3 are used in type
3 compensation scheme
(left NC in type 2)
Figure 5.
From the following formulas :
FZ =
1
, FP =
1
2π x R2 x C1
Middle Band Gain = ^{R 2}
2π x R2 x ⎜⎛ ^{C1× C 2} ⎟⎞
⎝^{C1 + C2} ⎠
R1
By calculation, the F_Z = 1kHz, F_P = 200kHz and
Middle Band Gain is 10 (i.e 20dB).
The asymptotic bode plot of EA compensation and
PWM loop gain is shown as Figure 6.
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Asymptotic Bode Plot of PWM Loop Gain
100
80
60
Uncompensated EA Gain
40
20
0
Compensated EA Gain
-20
PWM Loop Gain
-40
Modulator Gain
-60
1₁0₀
1₁0₀0₀
1¹0^K00 1¹0⁰0^K00 10¹0⁰0⁰0^K0 10¹0^M0000 10¹0⁰00^M000
Frequency (Hz)
Figure 6.
2. Droop & DAC Offset Setting
For each channel the load current is 60A / 3 = 20A
and the ripple current, ΔI_L, is given as :
5μs
x
1.5V
2uH
x
⎛⎜⎝_1−
1.5V
12V
⎞⎟⎠
=
3.28A
The
load
current,
IL,
at
S/H
is ^20A
−
ΔIL
2
= 18.36A
.
Using the following formula to select the appropriate
I_{X (MAX)} for the S/H of GM amplifier :
IX (MAX) = ^{R DS(ON) × 18.36A}
R SP
The suggested I_X is in the order of 50 to 60μA, select
R_SP = R_SN = 2kΩ, then I_{X (MAX)} will be 55μA.
V_DROOP = 120mV = 55μA × 2 × 3 (phase no.) × R_ADJ,
therefore R_ADJ will be 360Ω.
The R_DS(ON) of MOSFET varies with temperature rise.
When the low side MOSFET working at 70°C and
5000ppm/°C temperature coefficient of R_DS(ON), the
R_DS(ON) at 70°C is given as :
6mΩ × {1+ (70°C − 27°C) × 5000ppm/°C} = 7.3mΩ.
R_ADJ at 70°C is given as :
R_{ADJ_27°C} × (R_{DS(ON)_27°C} / R_{DS(ON)_70°C}) = 296Ω
3. Over-Current Protection Setting
OCP trip point is internally set at around 100μA of I_X
for each channel. As above-selected R_SP = R_SN = 2kΩ,
the OCP trip point is found using :
IX
(OCP)
=
RDS(ON) ×IL
RSP
(TRIP)
=
6mΩ × 33A
2kΩ
= 100μA
4. Soft-Start Capacitor Selection
C_SS = 0.1μF is the suitable value for most application.
DS9244-06 March 2007