RT4531 Datasheet, PDF (12/14 Pages) Richtek Technology Corporation – Dual Channel 10s2p WLED Drivers

RT4531
Thermal Considerations
For continuous operation, do not exceed absolute
maximum operation junction temperature. The maximum
power dissipation depends on the thermal resistance of
IC package, PCB layout, the rate of surroundings airflow
and temperature difference between junction to ambient.
The maximum power dissipation can be calculated by
following formula :
P_D(MAX) = ( T_J(MAX) − T_A ) / θ_JA
Where T_J(MAX) is the maximum operation junction
temperature, T_A is the ambient temperature and the θ_JA is
the junction to ambient thermal resistance.
For recommended operating condition specifications, the
maximum junction temperature is 125°C. The junction to
ambient thermal resistance, θ_JA, is layout dependent. For
WL-CSP-9B 1.35x1.35 (BSC) package, the thermal
resistance, θ_JA, is 81.5°C/W on the standard JEDEC 51-
7 four-layer thermal test board. The maximum power
dissipation at T_A = 25°C can be calculated by following
formula :
P_D(MAX) = (125°C − 25°C) / (81.5°C/W) = 1.22W for
WL-CSP-9B 1.35x1.35 (BSC) package
The maximum power dissipation depends on operating
ambient temperature for fixed T_J(MAX) and thermal
resistance θ_JA. The derating curve in Figure 3 of derating
curves allows the designer to see the effect of rising
ambient temperature on the maximum power allowed.
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
0
Four-Layer PCB
25
50
75
100
125
Ambient Temperature (°C)
Figure 3. Derating Curve of Maximum Power Dissipation
Layout Consideration
For best performance of the RT4531, the following
guidelines must be strictly followed.
 Input and Output capacitors should be placed close to
the IC and connected to ground plane to reduce noise
coupling.
 The GND and Exposed Pad should be connected to a
strong ground plane for heat sinking and noise protection.
 Keep the main current traces as possible as short and
wide.
 SW node of DC/DC converter is with high frequency
voltage swing. It should be kept at a small area.
 It recommended to separate the ISET line and PWM
line that avoid the PWM signal couple to ISET.
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DS4531-01 July 2016