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DS6257A Datasheet, PDF (12/15 Pages) Richtek Technology Corporation – 6A, 18V, 500kHz, ACOTTM Step-Down Converter
RT6257A/B
Feed-Forward Capacitor (CFF)
The RT6257A/B is optimized for ceramic output capacitors
and for low duty cycle applications. However for high-output
voltages, with high feedback attenuation, the circuit's
transient response can be slowed. In high-output voltage
circuits transient response is improved by adding a small
“feedforward” capacitor (CFF) across the upper FB divider
resistor (Figure 1), to speed up the transient response
without affecting the steady-state stability of the circuit.
Choose a suitable capacitor value that following suggested
component BOM.
VOUT
FB
RT6257A/B
GND
R1 CFF
R2
Figure 1. CFF Capacitor Setting
Enable Operation (EN)
For automatic start-up the high-voltage EN pin can be
connected to VIN, through a 100kΩ resistor. Its large
hysteresis band makes EN useful for simple delay and
timing circuits. EN can be externally pulled to VIN by
adding a resistor-capacitor delay (REN and CEN in Figure
2). Calculate the delay time using EN's internal threshold
where switching operation begins.
An external MOSFET can be added to implement digital
control of EN when no system voltage above 2V is available
(Figure 3). In this case, a 100kΩ pull-up resistor, REN, is
connected between VIN and the EN pin. MOSFET Q1 will
be under logic control to pull down the EN pin. To prevent
enabling circuit when VIN is smaller than the VOUT target
value or some other desired voltage level, a resistive voltage
divider can be placed between the input voltage and ground
and connected to EN to create an additional input under
voltage lockout threshold (Figure 4).
EN
VIN
REN
CEN
EN
RT6257A/B
GND
Figure 2. External Timing Control
REN
VIN 100k
Enable
EN
Q1 RT6257A/B
GND
Figure 3. Digital Enable Control Circuit
VIN
REN1
REN2
EN
RT6257A/B
GND
Figure 4. Resistor Divider for Lockout Threshold Setting
Output Voltage Setting
Set the desired output voltage using a resistive divider
from the output to ground with the midpoint connected to
FB. The output voltage is set according to the following
equation :
VOUT
 0.6V (1 +
R1
R2
)
VOUT
R1
FB
RT6257A/B
R2
GND
Figure 5. Output Voltage Setting
Place the FB resistors within 5mm of the FB pin. Choose
R2 between 10kΩ and 100kΩ to minimize power
consumption without excessive noise pick-up and
calculate R1 as follows :
R1 
R2(VOUT 
VREF
VREF
)
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DS6257A/B-00 September 2016