RT9629B Datasheet, PDF (10/14 Pages) Richtek Technology Corporation – Triple-Channel Synchronous Rectified Buck MOSFET Driver

RT9629B
Application Information
The RT9629B is a high frequency, triple-channel
synchronous rectified. MOSFET driver containing
Richtek's advanced MOSFET driver technologies. The
RT9629B is designed to be able to adapt from normal
MOSFET driving applications to high performance CPU
VR driving capabilities.
Supply Voltage and Power On Reset
The RT9629B can be utilized under both V_CCx = 5V or
V_CCx = 12V applications which may happen in different
fields of electronics application circuits. In terms of
efficiency, higher V_CCx equals higher driving voltage of
UGATEx/LGATEx which may result in higher switching
loss and lower conduction loss of power MOSFETs. The
choice of V_CCx = 12V or V_CCx = 5V can be a tradeoff to
optimize system efficiency. And VCC1 pin must be directly
connected to VCC2 pin.
The RT9629B controls both high side and low side N-
MOSFETs of three half-bridge power according to three
external input PWMx control signals. It has Power On
Reset (POR) function which held UGATEx and LGATEx
low before the VCCx voltage rises to higher than rising
threshold voltage. When V_CC1 and V_CC2 exceed the POR
threshold voltage, the voltage at the POR pin will be pulled
high.
Tri-state PWM Input
After the initialization, the PWMx signal takes the control.
The rising PWMx signal first forces the LGATEx signal to
turn low then UGATEx signal is allowed to go high just
after a non-overlapping time to avoid shoot through current.
The falling of PWMx signal first forces UGATEx to go low.
When UGATEx and PHASEx signal reach a
predetermined low level, LGATEx signal is allowed to turn
high.
The PWMx signal is acted as “ High” if the signal is above
the rising threshold and acted as “ Low” if the signal is
below the falling threshold. When PWM signal level enters
and remains within the shutdown window, the output drivers
are disabled and both MOSFET gates are pulled and held
low. If the PWMx signal is left floating, the pin will be kept
around 1.8V by the internal divider and provide the PWMx
controller with a recognizable level.
Bootstrap Power Switch
The RT9629B builds in an internal bootstrap power switch
to replace external bootstrap diode, and this can facilitate
PCB design and reduce total BOM cost of the system.
Hence, no external bootstrap diode is required in real
applications.
Non-overlap Control
To prevent the overlap of the gate drivers during the
UGATEx pull low and the LGATEx pull high, the non-overlap
circuit monitors the voltages at the PHASEx node and
high side gate drive (UGATEx − PHASEx). When the
PWMx input signal goes low, UGATEx begins to pull low
(after propagation delay). Before LGATEx is pulled high,
the non-overlap protection circuit ensures that the
monitored voltages have gone below 1.1V. Once the
monitored voltages fall below 1.1V, LGATEx begins to turn
high. By waiting for the voltages of the PHASEx pin and
high side gate driver to fall below 1.1V, the non-overlap
protection circuit ensures that UGATEx is low before
LGATEx pulls high.
Also to prevent the overlap of the gate drivers during
LGATEx pull low and UGATEx pull high, the non-overlap
circuit monitors the LGATEx voltage. When LGATEx goes
below 1.1V, UGATEx goes high after propagation delay.
Driving Power MOSFETs
The DC input impedance of the power MOSFET is
extremely high. When V_gs1 or V_gs2 is at 12V or 5V, the
gate draws the current only for few nano-amperes. Thus
once the gate has been driven up to “ ON” level, the
current could be negligible.
However, the capacitance at the gate to source terminal
should be considered. It requires relatively large currents
to drive the gate up and down 12V (or 5V) rapidly. It is
also required to switch drain current on and off with the
required speed. The required gate drive currents are
calculated as follows.
Copyright ©2012 Richtek Technology Corporation. All rights reserved.
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is a registered trademark of Richtek Technology Corporation.
DS9629B-03 October 2012