RT9524 Datasheet, PDF (10/12 Pages) Richtek Technology Corporation – Linear Single Cell Li-Ion Battery Charger IC for Portable Applications

RT9524
OVP threshold. It is not affected by the EN/SET input.
Note that the LDO current is independence and not
monitored by the charge current limit.
Charge Status Outputs (CHGSB and PGB)
The open-drain CHGSB and PGB outputs indicate various
charger operations as shown in the following table. These
status pins can be used to drive LEDs or communicate to
the host processor. Note that ON indicates the open-drain
transistor is turned on and LED is bright.
Table 2
Condition
CHGSB
Input OVP
OFF
Input UVLO
OFF
Charge (CC Mode and CV Mode) ON
Charge Done (IFULL)
OFF
PGB
OFF
OFF
ON
ON
Condition
Entering OVP
(V_IN = 5.5V→10V)
Leaving OVP
(V_IN = 10V→5.5V)
Entering SLEEP
(V_IN = 5.5V→3.6V)
Leaving SLEEP
(V_IN = 3.6V→5.5V)
Entering UVLO
(V_IN = 5.5V→2.5V)
Leaving UVLO
(V_IN = 2.5V→5.5V)
PGB Deglitches Time
EN/SET is
High
EN/SET is
Low
0
100μs
500μs
0
450μs
32ms
500μs
500μs
0
0
230μs
230μs
Sleep Mode
The RT9524 enters sleep mode if the power is removed
from the input. This feature prevents draining the battery
during the absence of input supply.
Temperature Regulation and Thermal Protection
In order to maximize charge rate, the RT9524 features a
junction temperature regulation loop. If the power
dissipation of the IC results in a junction temperature
greater than the thermal regulation threshold (125°C), the
RT9524 limits the charge current in order to maintain a
junction temperature around the thermal regulation
threshold (125°C). The RT9524 monitors the junction
temperature, T_J, of the die and disconnects the battery
from the input if T_J exceeds 125°C. This operation
continues until junction temperature falls below thermal
regulation threshold (125°C) by the hysteresis level. This
feature prevents maximum power dissipation from
exceeding typical design conditions.
Selecting the Input and Output Capacitors
In most applications, all that is needed is a high-frequency
decoupling capacitor on the input. A 1μF ceramic capacitor,
placed in close proximity to input to GND, works well. In
some applications depending on the power supply
characteristics and cable length, it may be necessary to
add an additional 10μF ceramic capacitor to the input.
The RT9524 requires a small output capacitor for loop
stability. A typical 1μF ceramic capacitor placed between
the BATT pin and GND is sufficient.
Thermal Considerations
For continuous operation, do not exceed absolute
maximum operation junction temperature. The maximum
power dissipation depends on thermal resistance of the
IC package, PCB layout, rate of surrounding airflow, and
difference between junction and ambient temperature. The
maximum power dissipation can be calculated by the
following formula :
P_D(MAX) = (T_J(MAX) − T_A) / θ_JA
where T_J(MAX) is the maximum operation junction
temperature, T_A is the ambient temperature, and θ_JA is the
junction to ambient thermal resistance.
For recommended operating conditions specification of
RT9524, the maximum junction temperature is 125°C and
T_A is the maximum ambient temperature. The junction to
ambient thermal resistance, θ_JA, is layout dependent. For
WDFN-10L 3x2 packages, the thermal resistance, θ_JA , is
90°C/W on a standard JEDEC 51-7 four-layer thermal test
board. The maximum power dissipation at T_A = 25°C can
be calculated by the following formula :
P_D(MAX) = (125°C − 25°C) / (90°C/W) = 1.111W for
WDFN-10L 3x2 package
The maximum power dissipation depends on operating
ambient temperature for fixed T_J(MAX) and thermal
resistance, θ_JA. For RT9524 package, the derating curve
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DS9524-01 April 2011