RT8024 Datasheet, PDF (10/13 Pages) Richtek Technology Corporation – 1.5MHz, 400mA, High Efficiency PWM Step-Down DC/DC Converter

RT8024
curves. Thus, to obtain I²R losses, simply add R_SW to R_L
and multiply the result by the square of the average output
current.
Other losses including C_IN and C_OUT ESR dissipative
losses and inductor core losses generally account for less
than 2% of the total loss.
Thermal Considerations
The maximum power dissipation depends on the thermal
resistance of IC package, PCB layout, the rate of
surroundings airflow and temperature difference between
junction to ambient. The maximum power dissipation can
be calculated by following formula :
P_D(MAX) = ( T_J(MAX) - T_A ) / θ_JA
Where T_J(MAX) is the maximum operation junction
temperature 125°C, T_A is the ambient temperature and the
θ_JA is the junction to ambient thermal resistance.
For recommended operating conditions specification of
RT8024 DC/DC converter, where T_{J (MAX)} is the maximum
junction temperature of the die (125°C) and T_A is the
maximum ambient temperature. The junction to ambient
thermal resistance θ_JA is layout dependent. For
SOT-23-5/TSOT-23-5 packages, the thermal resistance θ_JA
is 250°C/W on the standard JEDEC 51-3 single-layer
thermal test board. The maximum power dissipation at
T_A = 25°C can be calculated by following formula :
P_D(MAX) = ( 125°C - 25°C ) / 250 = 0.4 W for SOT-23-5/
TSOT-23-5 packages
The maximum power dissipation depends on operating
ambient temperature for fixed T_J(MAX) and thermal
resistance θ_JA. For RT8024 packages, the Figure 5 of
derating curves allows the designer to see the effect of
rising ambient temperature on the maximum power
allowed.
The value of junction to case thermal resistance θ_JC is
popular for users. This thermal parameter is convenient
for users to estimate the internal junction operated
temperature of packages while IC operating. It's
independent of PCB layout, the surroundings airflow effects
and temperature difference between junction to ambient.
The operated junction temperature can be calculated by
following formula :
T_J = T_C + P_D x θ_JC
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Where T_C is the package case (Pin 2 of package leads)
temperature measured by thermal sensor, P_D is the power
dissipation defined by user's function and the θ_JC is the
junction to case thermal resistance provided by IC
manufacturer. Therefore it's easy to estimate the junction
temperature by any condition.
Checking Transient Response
The regulator loop response can be checked by looking
at the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
a load step occurs, V_OUT immediately shifts by an amount
equal to ΔI_LOAD (ESR), where ESR is the effective series
resistance of C_OUT. ΔI_LOAD also begins to charge or
discharge C_OUT generating a feedback error signal used
by the regulator to return V_OUT to its steady-state value.
During this recovery time, V_OUT can be monitored for
overshoot or ringing that would indicate a stability problem.
450
Single Layer PCB
400
350
SOT-23-5, TSOT-23-5 Packages
300
250
200
150
100
50
0
0
20 40 60 80 100 120 140
Ambient Temperature (°C)
Figure 5. Derating Curves for RT8024 Package
Layout Considerations
Follow the PCB layout guidelines for optimal performance
of RT8024.
` For the main current paths as indicated in bold lines in
Figure 6, keep their traces short and wide.
` Put the input capacitor as close as possible to the device
pins (VIN and GND).
` LX node is with high frequency voltage swing and should
be kept small area. Keep analog components away from
LX node to prevent stray capacitive noise pick-up.
DS8024-02 March 2011