English
Language : 

2N4391 Datasheet, PDF (10/14 Pages) Seme LAB – JFET SWITCHING N CHANNEL- DEPLETION
01/99
B-19
2N5114, 2N5115, 2N5116
P-Channel Silicon Junction Field-Effect Transistor
Â¥ Analog Switches
Absolute maximum ratings at TA = 25¡C
Reverse Gate Source & Reverse Gate Drain Voltage
– 40 V
Gate Current
50 mA
Continuous Device Power Dissipation
500mW
Power Derating
3 mW/°C
Storage Temperature Range
– 65°C to + 200°C
At 25°C free air temperature:
Static Electrical Characteristics
Gate Source Breakdown Voltage
Gate Reverse Current
Gate Source Cutoff Voltage
Gate Source Forward Voltage
Drain Saturation Current (Pulsed)
Drain Cutoff Current
Drain Source ON Voltage
Static Drain Source ON Resistance
Dynamic Electrical Characteristics
Drain Source ON Resistance
Common Source Input Capacitance
Common Source Reverse
Transfer Capacitance
Switching Characteristics
Turn ON Delay Time
Rise Time
Turn OFF Delay Time
Fall Time
V(BR)GSS
IGSS
VGS(OFF)
VGS(F)
IDSS
ID(OFF)
VDS(ON)
rDS(ON)
rds(on)
Ciss
Crss
td(on)
tr
td(off)
tf
2N5114
2N5115
2N5116
Min Max Min Max Min Max Unit
30
30
30
V
500
500
500 pA
1
1
1 µA
5 10 3 6 1 4 V
–1
–1
–1 V
– 30 – 90
mA
– 15 – 60 – 5 – 25 mA
– 500
pA
–1
µA
– 500
pA
–1
µA
– 500 pA
– 1 µA
– 1.3
V
– 0.8
V
– 0.6 V
75
100
150 Ω
75
100
150 Ω
25
25
27 pF
7
pF
7
pF
7 pF
6
10
25 ns
10
20
35 ns
6
8
20 ns
15
30
60 ns
Process PJ99
Test Conditions
IG = – 1µA, VDS = ØV
VGS = 20V, VDS = ØV
VGS = 20V, VDS = ØV
VDS = – 15V, IG = – 1 nA
VDS = ØV, IG = – 1 mA
VGS = ØV, VDS = – 18V
VGS = ØV, VDS = – 15V
VDS = – 15V, VGS = 12 V
VDS = – 15V, VGS = 12 V
VDS = – 15V, VGS = 7V
VDS = – 15V, VGS = 7V
VDS = – 15V, VGS = 5V
VDS = – 15V, VGS = 5V
VGS = ØV, ID = – 15 mA
VGS = ØV, ID = – 7 mA
VGS = ØV, ID = – 3 mA
VGS = ØV, ID = – 1 mA
TA = 150°C
TA = 150°C
TA = 150°C
TA = 150°C
VGS = ØV, ID = ØA
VDS =– 15V, VGS = ØV
VDS = ØV, VGS = 12V
VDS = ØV, VGS = 7 V
VDS = ØV, VGS = 5V
f = 1 kHz
f = 1 MHz
f = 1 MHz
f = 1 MHz
f = 1 MHz
VDD
VGG
RL
RG
ID(ON)
2N5114 2N5115 2N5116
– 10
–6
–6
V
20
12
8
V
130 910 2000
Ω
100 220
390
Ω
– 15
–7
–3
mA
TOÐ18 Package
See Section G for Outline Dimensions
Pin Configuration
1 Source 1, 2 Gate & Case, 3 Drain
www.interfet.com
1000 N. Shiloh Road, Garland, TX 75042
(972) 487-1287 FAX (972) 276-3375