ZULU-868 Datasheet, PDF (4/9 Pages) rfsolutions.ltd – RT Trans-controller

ZULU
Pin Description (continued)
Pin No
Name
P0.3
Direction
D In / Out
or A In
Description
Port 0.3 See RF50 Port I/O section for complete descrip-
tion
XTAL2
A Out
External Clock Output. This pin is the excitation driver for
an external crystal or resonator.
9
D In
External Clock Input. This pin is the external clock input in
external CMOS clock mode.
A In
External Clock Input. This pin is the external clock input in
capacitor or RC oscillator configurations.
P0.2
D In/Out
or A In
See RF50 Oscillator section for complete details.
Port 0.2. See RF50 Port I/O Section for a complete de-
scription.
10
XTAL1
A In
External Clock Input. This pin is the external oscillator re-
turn for a crystal or resonator.
See RF50 Oscillator section.
P0.0
D In/Out Port 0.0. See RF50 Port I/O section for a complete de-
or A In scription.
11
VREF
AI
External VREF Input.
AO
Internal VREF Output. External VREF decoupling capaci-
tors are recommended.
See RF50 Voltage Reference section.
RST
Device Reset. Open-drain output of internal POR or VDD
monitor. An external source can initiate a system reset by
driving this pin low for at least 15 µs. A 1–5k pull-up to
12
D In/Out VDD_MCU is recommended. See Reset Sources section
for a complete description.
C2CK
Clock signal for the C2 Debug Interface
P2.7
Port 2.7. This pin can only be used as GPIO. The Crossbar
cannot route signals to this pin and it cannot be config-
13
D In/Out
ured as an analog input. See RF50 Port I/O section for a
complete description.
C2D
Bi-directional data signal for the C2 Debug Interface.
14
P2.6
D In / Out Port 2.6.
or A In See RF50 Port I/O section for a complete description.
16
Vcc
In
Positive power supply, 1.8 to 3.6 V.
DS-ZULU-1