RFSA2644 Datasheet, PDF (6/12 Pages) RF Micro Devices – SERIAL CONTROLLED DIGITAL STEP ATTENUATOR 50MHz TO 4000MHz, 6-BIT, 0.5dB LSB

RF_RS_FA_S2₂6₆4₄4
Serial Port Interface
SPI Ti ing D^Si^Pa^Ig^Tra^{iming Diagram}
t6
t1
t2
t3
t4
t5
t8
CLK
Programming Example - 6-Bit
DATA
t7
LE
DOUT
t9
t 10
C16
C8
1
1
1
1
1
1
1
1
1
1
1
0
0
1
0
0
Truth Table
Control Bit
C4
C2
C1
1
1
1
1
1
1
1
1
0
1
0
1
0
1
1
1
1
1
1
1
1
0
0
0
C0.5
1
0
1
1
1
1
1
0
Relative Gain
Setting
Max gain
-0.5dB
-1dB
-2dB
-4dB
-8dB
-16dB
-31.5dB
SPI Timing Diagram Specifications
Parameter
t1
Limit
25
Unit
MHz max
Comment
CLK Frequency
t2
20
ns min
CLK High
t3
20
ns min
CLK Low
t4
5
ns min
DATA to CLK Setup Time
t5
5
ns min
DATA to CLK Hold Time
t6
30
ns min
Data Valid
t7
5
ns min
LE to CLK Setup Time
t8
5
ns min
CLK to LE Setup Time
t9
10
ns min
LE Pulse Width
t10
20
ns max
Output Set
Logic Voltage Levels
State
Logic
Low
0V to 0.8V
High
2.0V to 5.0V
Power-up Programming Truth Table
PUP
Attenuator Setting
Low
Attenuation at max, 31.5dB
High
Attenuation at min, 0dB
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