RF5187_06 Datasheet, PDF (3/6 Pages) RF Micro Devices – LOW POWER LINEAR AMPLIFIER

RF5187
Pin
1
2
3
4
5
6
7
8
Pkg
Base
Function
RF IN
RF IN
PC
VCC
RF OUT
RF OUT
RF OUT
RF OUT
GND
Description
Interface Schematic
RF input. This input is DC-coupled, so an external blocking capacitor is
required if this pin is connected to a DC path. An optimum match to
50Ω is obtained by providing an external series capacitor of 2.4pF and
then a shunt capacitor of 2.4pF. Those values are typical for 2140MHz;
other values may be required for other frequencies.
Same as pin 1.
Power control pin. For obtaining maximum performance, the voltage on
this pin can be used to set correct bias level. For low power linear appli-
cations, it is recommended that a constant bias control loop be used
(see datasheet evaluation board schematic). A voltage of 0.5V or less
at V_PC brings the part into Power Down State.
Power supply pin for the bias circuits. External low frequency bypass
capacitors should be connected if no other low frequency decoupling is
nearby.
RF output and bias for the output stage. The power supply for the out-
put transistor needs to be supplied to this pin. This can be done
through a quarter-wavelength microstrip line that is RF-grounded at the
other end, or through an RF inductor that supports the required DC cur-
rents. Optimum load impedance is achieved by providing a shunt
capacitor of 1.8pF and a series capacitor of 3.3pF. Those values are
typical for 2140MHz; other values may be required for other frequen-
cies. Since there are several output pins available (which are internally
connected), one pin can be used for connecting the bias, another for
connecting a (third) harmonic trap filter, and the other pins for the RF
output.
Same as pin 5.
Same as pin 5.
Same as pin 5.
Ground connection. The backside of the package should be connected
to the ground plane through a short path (i.e., vias under the device
may be required).
Rev A7 060630
2-651