RF6886 Datasheet, PDF (2/16 Pages) RF Micro Devices – 3.6V, 100MHz TO 1000MHz LINEAR POWER AMPLIFIER

RF6886
Absolute Maximum Ratings
Parameter
Rating
VC2 Collector Quiescent Bias
350
Current (I_CQ2)
VC1 Collector Quiescent Bias
Current (I_CQ1)
Maximum Supply Current
(I_CC1 + I_CC2)
Device Voltage (V_D)
Power Dissipation
150
3100
4.0
5
Operating Lead Temperature
(T_AMBIENT)
Max RF Input 50 Output Load
-40 to +85
12
Max RF Output 50 Load
38
Output Load VSWR
See Theory of Operation Sec-
tion
Storage Temperature Range
-40 to +150
Operating Junction Temperature
(T_J)
ESD Rating - Human Body Model
(HBM)
150
Class 1A
Moisture Sensitivity Level (MSL)
MSL1
Unit
mA
mA
mA
V
W
°C
dBm
dBm
°C
°C
V
Caution! ESD sensitive device.
Exceeding any one or a combination of the Absolute Maximum Rating conditions may
cause permanent damage to the device. Extended application of Absolute Maximum
Rating conditions to the device may reduce device reliability. Specified typical perfor-
mance or functional operation of the device under Absolute Maximum Rating condi-
tions is not implied.
RoHS status based on EUDirective2002/95/EC (at time of this document revision).
The information in this publication is believed to be accurate and reliable. However, no
responsibility is assumed by RF Micro Devices, Inc. ("RFMD") for its use, nor for any
infringement of patents, or other rights of third parties, resulting from its use. No
license is granted by implication or otherwise under any patent or patent rights of
RFMD. RFMD reserves the right to change component circuitry, recommended appli-
cation circuitry and specifications at any time without prior notice.
Parameter
Typical Electrical Specifications
for 433MHz to 470MHz
Operating Frequency
OP1dB
Small SIgnal Gain
Saturated Output Power (P_SAT)
Saturated Efficiency
Saturated Output Power (P_SAT)
Saturated Efficiency
Saturated Output Power (P_SAT)
Saturated Efficiency
TETRA ADJ Channel Power
Specification
Min. Typ. Max.
433
450
470
34.5
33
36.8
55
36.3
54.5
35.2
53
-38
TETRA ALT Channel Power
-53
CDMA ADJ Channel Power
-50
CDMA ALT Channel Power
-67
Unit
Condition
See 433MHz to 470MHz Evaluation Board Schematic
MHz
dBm
dB
dBm
%
dBm
%
dBm
%
dBc
dBc
dBc
dBc
V_CC=3.6V, V_REG1=V_REG2=3.1V, I_CQ total=390mA
V_CC=3.3V, V_REG1=V_REG2=3.1V, I_CQ total=380mA
V_CC=3.0V, V_REG1=V_REG2=3.1V, I_CQ total=370mA
V_CC=3.6V, V_REG1=V_REG2=2.7V, I_CQ total=187mA
TETRA: PAR=2.6dB, P_OUT=32dBm, 24.3kHz channel BW,
ADJ offset=25kHz, ALT offset=50kHz
CDMA: PAR=4.5dB, P_OUT=32dBm, 1.23MHz channel BW,
ADJ CH offset/BW=750kHz/30kHz, ALT CH
offset/BW = 1.98 MHz/30 kHz
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