RF5189_1 Datasheet, PDF (3/12 Pages) RF Micro Devices – 3V, 2.45GHz LINEAR POWER AMPLIFIER

RF5189
Pin Function Description
Interface Schematic
1
RF IN
RF input. Input is matched to 50Ω and DC block is provided internally.
VCC1
INPUT
MATCH
INTERSTAGE
MATCH
2
NC
No connect. Recommend connecting to ground.
3
BIAS1GND ^{Ground for first stage bias circuit. For best performance, keep traces physi- See pin 4.}
cally short and connect immediately to ground plane.
4
VREG1
First stage input bias. This pin requires a regulated supply to maintain
nominal bias current.
VREG1
VREG2
BIAS
BIAS BIAS
GND1 GND2
5
VREG2
Second stage input bias. This pin requires a regulated supply to maintain See pin 4.
nominal bias current. Usually connected to VREG1.
6
BIAS2GND ^{Ground for second stage bias circuit. For best performance, connect to See pin 4.}
ground with a choke inductor.
7
PWR SEN ^{Provides an output voltage proportional to output RF level.}
8
RF OUT
RF output. Output is matched to 50Ω and DC block is provided internally.
VCC2
OUTPUT
MATCH
RF OUT
9
10
11
12
Pkg
Base
RF OUT
VCC2
VCC2
VCC1
GND
Same as pin 8.
Second stage output bias. Supply should be connected through a choke
inductor sized appropriately to handle the output bias current.
Same as pin 10.
First stage output bias. This pin is sensitive to bypass capacitors placed
close to it. Place an RF short approximately 200mils from this pin before
any other supply connections.
Ground connection. The backside of the package should be connected to
the ground plane through a short path (i.e., vias under the device will be
required).
See pin 8.
See pin 8.
See pin 8.
See pin 1.
Rev A8 DS071212
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