R5F64185NFD_13 Datasheet, PDF (9/127 Pages) Renesas Technology Corp – RENESAS MCU

R32C/118 Group
1.3 Block Diagram
Figure 1.2 shows the block diagram for the R32C/118 Group.
1. Overview
8
8
8
8
8
8
8
Port P0
Port P1
Port P2
Port P3
Port P4
Port P5
Port P6
Peripherals
Timers:
Timer A 16 bits × 5 timers
Timer B 16 bits × 6 timers
Three-phase motor
controller
Serial interface:
9 channels
Multi-master I²C-bus
interface:
1 channel
Intelligent I/O
Time measurement: 16
Wave generation: 24 ⁽²⁾
Serial interface:
- Variable-length
synchronous serial I/O
- IEBus
CAN module:
2 channels
A/D converter:
10 bits × 1 circuit
Standard: 10 inputs
Maximum: 34 inputs ⁽¹⁾
D/A converter:
8 bits × 2 channels
X-Y converter:
16 bits × 16 bits
CRC calculator (CCITT)
X¹⁶ + X¹² + X⁵ + 1
Clock generator:
4 circuits
- XIN-XOUT
- XCIN-XCOUT
- On-chip oscillator
- PLL frequency synthesizer
Watchdog timer:
15 bits
DMAC
DMAC II
R32C/100 Series CPU Core
RRRRSFAAAA2367RRRRBRRRRB0123SFAAAA2367BRRRR0145B0123 ₀₁₄₅
FLG
INTB
ISP
USP
PC
SVF
SVP
VCT
Memory
ROM
RAM
Multiplier
Floating-point unit
Port P15
Port P14
Port P14_1
Port P13
Port P12
Port P11
8
4
8
8
5
(Note 4)
Notes:
1. The 144-pin package has 34 inputs. The 100-pin package can have up to 26 inputs.
2. The 144-pin package has 24 outputs. The 100-pin package has 19 outputs.
3. The 144-pin package has eight ports. The 100-pin package has five I/O ports and one input-only port
(P9_1).
4. Ports P11 to P15 are only available in the 144-pin package.
Figure 1.2 R32C/118 Group Block Diagram
R01DS0065EJ0120 Rev.1.20
Feb 6, 2013
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