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HD74LV2GT241A_15 Datasheet, PDF (9/11 Pages) Renesas Technology Corp – Dual Bus Buffer Noninverted with 3–state Output / CMOS Logic Level Shifter
HD74LV2GT241A
• Waveforms – 1
tr
Input A
10 %
90 %
Vref
tPLH
tf
90 %
Vref
10 %
tPHL
VI
GND
Output Y
50%
VOH
50%
VOL
• Waveforms – 2
tr
Input OE
10 %
90 %
Vref
tf
90 %
Vref
10 %
Input OE
Waveform – A
Waveform – B
50%
tZL
50%
tZH
50%
50%
tLZ
tHZ
VOL + 0.3 V
VOH – 0.3 V
INPUTS
VCC (V)
Vref
VI
tr / tf
3.3±0.3 2.5 V ≤ 3.0 ns 50%
5.0±0.5 3 V ≤ 3.0 ns 1.5 V
VI
GND
VCC
GND
VCC
VOL
VOH
GND
Notes: 1. Input waveform : PRR ≤ 1 MHz, Zo = 50 Ω.
2. Waveform – A is for an output with internal conditions such that the output is low
except when disabled by the output control.
3. Waveform – B is for an output with internal conditions such that the output is high
except when disabled by the output control.
4. The output are measured one at a time with one transition per measurement.
Rev.2.00, Oct.23.2003, page 7 of 8