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HD74LS190 Datasheet, PDF (9/11 Pages) Hitachi Semiconductor – Synchronous Up/Down Decade Counters(single clock line)
HD74LS190
Waveforms 4
Clock→Q
3V
Load
0V
3V
Data
0V
3V
Down/Up
0V
Clock
1.3V
3V
1.3V
0V
Notes:
Q
Enable = 0V
1.3V
tPLH
1.3V
tPHL
VOH
VOL
1. When test the QA, QB, and QC outputs, data inputs A, B and C are shown by the solid line, and
data input D is shown by the dashed line.
2. When test the QD output, data inputs A and D are shown by the solid line, and data inputs B
and C are held at the low logic level.
Waveforms 5
Clock→Max / Min
3V
Load
0V
3V
A
0V
Inputs
3V
B, C, D
0V
3V
Down/Up
0V
Clock
1.3V
1.3V
3V
1.3V
1.3V
0V
Note:
Max/Min
Enable = 0V
1.3V
1.3V
1.3V
1.3V
tPLH
tPHL
tPLH
tPHL
VOH
VOL
Data inputs B and C are shown by the dashed line. Data input D is shown by the solid line.
Rev.3.00, Jul.15.2005, page 9 of 10