V850ESIE2_15 Datasheet, PDF (8/12 Pages) Renesas Technology Corp – 32-BIT SINGLE-CHIP MICROCONTROLLER

Preliminary Product Information
Other functions overview
Function
A/D converter
Overview
 Two 10-bit resolution A/D converter circuits (A/D converters 0 and 1)
 Simultaneous sampling of two circuits possible
 A/D converter 0: ANI00 to ANI03 (4 channels)
 A/D converter 1: ANI10 to ANI13 (4 channels)
 A/D conversion result registers 0m and 1m
(ADA0CRm and ADA1CRm)
 A/D conversion trigger mode
 Software trigger mode
 Hardware trigger mode
External trigger mode
Timer trigger mode
 Operating voltage range
 VDD = EVDD = AVDDn = AVREFn = 4.5 to 5.5 V
Remark m = 0 to 3, n = 0, 1
Interrupt/exception  Interrupts
processing
 Non-maskable interrupts: 1 sources (Internal)
 Maskable interrupts: External: 7, Internal: 35 sources
 8 levels of programmable priorities (maskable interrupts)
 Multiple interrupt control according to priority
 Masks can be specified for each maskable interrupt request.
 Exceptions
 Software exceptions: 32 sources
 Exception trap: 2 sources (illegal op code exception and debug trap)
Standby modes  The power consumption of the system can be effectively reduced by using
the standby modes in combination and selecting the appropriate mode for
the application.
 HALT mode: Mode to stop only the operating clock of the CPU
 IDLE mode: Mode to stop all the operations of the internal circuits
except the oscillator and PLL.
 STOP mode: Mode to stop all the operations of the internal circuits
except the oscillator.
Clock monitor  The clock monitor samples the main clock by using the internal oscillation
clock and generates a reset request signal and turn to the 6-phase PWM
output ports and TOP21 when oscillation of the main clock is stopped.
Low-voltage  Compares the supply voltage (VDD) and detected voltage (VLVI) and
Detector (LVI)
generates an internal interrupt signal or internal reset signal when VDD <
VLVI.
 The level of the supply voltage to be detected can be changed by software
(in two steps).
 Interrupt or reset signal can be selected by software.
 Can operate in STOP mode.
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V850ES/IE2 PPI (Ver. 1.0)
NEC Electronics Corporation November 2005