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HD74LV20A_15 Datasheet, PDF (8/11 Pages) Renesas Technology Corp – Dual 4-input Positive NAND Gates | |||
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HD74LV20A
Test Circuit
Measurement point
CL*
Note: CL includes the probe and jig capacitance.
⢠Waveform â 1
tr
tf
90%
90%
VCC
Input
50% VCC
50% VCC
10%
10%
0V
tPLH
tPHL
In phase output
tPHL
50% VCC
50% VCC
tPLH
VOH
VOL
Out of phase output
VOH
50% VCC
50% VCC
VOL
Notes:1. Input waveform: PRR ⤠1 MHz, Zo = 50 â¦, tr ⤠3 ns, tf ⤠3 ns
2. The output are measured one at a time with one transition per measurement.
Rev.3.00 May 31, 2004 page 6 of 8
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