4250 Datasheet, PDF (8/59 Pages) Energizer – Industrial Rubber Light

MITSUBISHI MICROCOMPUTERS
4250 Group
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
I/O PORT
(1) Port D (D0–D3)
Each pin of port D has an independent 1-bit wide I/O function.
Each pin has an output latch. For input/output of ports D0–D3,
select one of port D with the register Y of data pointer first. For
input use, set the latch of the specified bit to “1.” All port D
output latches can be set to “1” with the CLD instruction. The
output structure is the N-channel open-drain. Ports D2 and D3
are also used as ports C and K, respectively. Accordingly,
when port D2/C is used as port D2, set the port C output latch
to “1.” When port D3/K is used as port D3, set the port K output
latch to “1.”
(2) Port C
1-bit I/O port.
Port C output latch can be set to “1” with the SCP instruction.
Port C output latch can be cleared to “0” with the RCP
instruction. Port C input level can be examined by executing
the skip (SNZCP) instruction. For input use, set the latch of
the specified bit to “1.” The output structure is the N-channel
open-drain. The pull-up transistor of port C is turned on when
the bit 1 of register PU0 is set to “1” by software. Port C is also
used as port D2. Accordingly, when port D2/C is used as port
C, set the port D2 output latch to “1.”
(3) Port K
1-bit I/O port.
For input use, set the latch of the specified bit to “1.” The
output structure is the N-channel open-drain. The pull-up
transistor of port K is turned on when the bit 1 of register PU0
is set to “1” by software. Port K is also used as port D3.
Accordingly, when port D3/K is used as port K, set the port D3
output latch to “1.”
(4) Port G (G0–G3)
4-bit I/O port.
For input use, set the latch of the specified bit to “1.” The
output structure is the N-channel open-drain. The pull-up
transistor of port G is turned on when the bit 0 of register PU0
is set to “1” by software. Ports G0 and G1 are also used as INT
pin and TOUT pin, respectively.
Pull-up control register
Pull-up control register PU0
Ports C and K
PU01
pull-up transistor control bit
Ports G0–G3
PU00
pull-up transistor control bit
Note: “W” represents write enabled.
at reset : 002
at RAM back-up : state retained
W
0 Pull-up transistor OFF
1 Pull-up transistor ON
0 Pull-up transistor OFF
1 Pull-up transistor ON
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