RAA730101_15 Datasheet, PDF (71/108 Pages) Renesas Technology Corp – 16-bit ΔΣ A/D converter IC with programmable gain instrumentation amplifier

RAA730101
9. Power Supply Configuration
9.3 Sequence of power-on, power-off, and switching to standby mode
Figures 9.4 to 9.7 show the timing at which to power on, power off, and switch to standby mode.
RVDD
(IOVDD
(configuration 1))
AREG
(AVDD, IOVDD
(configuration 2))
AREGPD
3.3 V
1800 µs
AREG operating normally
2.2 V to 2.4 V
ADET
VREFON
VREF
CREGSTBYB
550 µs
550 µs
CREG
CDET
700 µs
400 µs
On standby 150 µs
5 ms
POR
OSC
(20 MHz)
Flash memory
SBIAS
SBIASDET
250 µs ^{OSC: Operating}
Digital blocks: Operating
Data read
250 µs
250 µs OSC: Operating
5 ms
250 µs
AFEON
SLP
Figure 9.4 Timing chart 1 (for configurations 1 and 2, during SPI communication (SMODE = 1))
R02DS0014EJ0110 Rev.1.10
Jul 31, 2014
Page 71 of 105