English
Language : 

R1LV0208BSA Datasheet, PDF (7/15 Pages) Renesas Technology Corp – 2Mb Advanced LPSRAM (256k word x 8bit)
R1LV0208BSA
Read Cycle
Parameter
Read cycle time
Address access time
Chip select access time
Output enable to output valid
Output hold from address change
Chip select to output in low-Z
Output enable to output in low-Z
Chip deselect to output in high-Z
Output disable to output in high-Z
R1LV0208BSA-5S*
R1LV0208BSA-7S*
Symbol
Unit
Note
Min.
Max.
Min.
Max.
tRC
55
-
70
-
ns
tAA
-
55
-
70
ns
tACS1
-
55
-
70
ns
tACS2
-
55
-
70
ns
tOE
-
30
-
35
ns
tOH
10
-
10
-
ns
tCLZ1
10
-
10
-
ns
2,3
tCLZ2
10
-
10
-
ns
2,3
tOLZ
5
-
5
-
ns
2,3
tCHZ1
0
20
0
25
ns
1,2,3
tCHZ2
0
20
0
25
ns
1,2,3
tOHZ
0
20
0
25
ns
1,2,3
R10DS0050EJ0100 Rev.1.00
2011.03.30
Page 7 of 13