HD74LV2GT02A_15 Datasheet, PDF (7/10 Pages) Renesas Technology Corp – Dual 2-input NOR Gates / CMOS Logic Level Shifter

HD74LV2GT02A
Switching Characteristics
• V_CC = 3.3 ± 0.3 V
Item
Propagation
delay time
Symbol
t_PLH
t_PHL
Ta = 25°C
Min Typ
— 7.0
— 9.0
Max
11.0
14.0
Ta = –40 to 85°C
Test
FROM
Min Max ^{Unit Conditions (Input)}
1.0 13.0 ns C_L = 15 pF A or B
1.0 15.5
C_L = 50 pF
TO
(Output)
Y
• V_CC = 5.0 ±0.5 V
Item
Propagation
delay time
Symbol
t_PLH
t_PHL
Ta = 25°C
Min Typ
— 5.0
— 6.5
Max
6.2
9.0
Ta = –40 to 85°C
Test
FROM
Min Max ^{Unit Conditions (Input)}
1.0 7.5 ns C_L = 15 pF A or B
1.0 10.0
C_L = 50 pF
TO
(Output)
Y
Operating Characteristics
• C_L = 50 pF
Item
Power dissipation
capacitance
Symbol
C_PD
T_a = 25°C
V_CC (V) _Min
Typ
5.0
—
10.3
Max ^Unit
—
pF
Test Circuit
Test Conditions
f = 10 MHz
V_CC
Pulse
generator
Input
50 Ω
Output
C_L
Note: Operating current test time, output is open.
Rev.2.00, Oct.14.2003, page 5 of 7