HD74LV2G74A_15 Datasheet, PDF (7/11 Pages) Renesas Technology Corp – Single D–type Flip Flops with Preset and Clear

HD74LV2G74A
Switching Characteristics
Item
Maximum clock
frequency
Propagation
delay time
Setup time
Hold time
Pulse width
Symbol
f_max
t_PLH
t_PHL
t_su
t_h
t_w
T_a = 25°C
Min Typ Max
30
60
—
20
40
—
— 16.3 27.0
— 17.9 29.0
— 21.6 34.0
— 24.5 39.5
13.0 —
—
9.0 —
—
0.5 —
—
12.0 —
—
12.0 —
—
T_a = –40 to 85°C
Min Max
20
—
15
—
1.0 29.0
1.0 32.0
1.0 36.5
1.0 42.5
14.0 —
9.0
—
0.5
—
13.0 —
13.0 —
Test
Unit _Conditions
V_CC = 1.8 ± 0.15 V
FROM
TO
(Input) (Output)
MHz
ns
C_L = 15 pF
C_L = 50 pF
C_L = 15 pF
PRE/CLR
CLK
Q or Q
C_L = 50 pF PRE/CLR Q or Q
CLK
ns
D
PRE or CLR inactive
ns
ns
PRE or CLR “L”
CLK “H” or “L”
Item
Maximum clock
frequency
Propagation
delay time
Setup time
Hold time
Pulse width
Symbol
f_max
t_PLH
t_PHL
t_su
t_h
t_w
T_a = 25°C
Min Typ Max
50 100 —
30
70
—
—
9.8 14.8
— 11.1 16.4
— 13.0 17.4
— 14.2 20.0
8.0
—
—
7.0
—
—
0.5
—
—
8.0
—
—
8.0
—
—
T_a = –40 to 85°C
Min Max
40
—
25
—
1.0 17.0
1.0 19.0
1.0 20.0
1.0 23.0
9.0
—
7.0
—
0.5
—
9.0
—
9.0
—
Unit
Test
Conditions
V_CC = 2.5 ± 0.2 V
FROM
TO
(Input) (Output)
MHz
ns
C_L = 15 pF
C_L = 50 pF
C_L = 15 pF
PRE/CLR
CLK
Q or Q
C_L = 50 pF PRE/CLR Q or Q
CLK
ns
D
PRE or CLR inactive
ns
ns
PRE or CLR “L”
CLK “H” or “L”
Item
Maximum clock
frequency
Propagation
delay time
Setup time
Hold time
Pulse width
Symbol
f_max
t_PLH
t_PHL
t_su
t_h
t_w
T_a = 25°C
Min Typ Max
80 140 —
50
90
—
—
6.9 12.3
—
7.9 11.9
—
9.2 15.8
— 10.2 15.4
6.0
—
—
5.0
—
—
0.5
—
—
6.0
—
—
6.0
—
—
T_a = –40 to 85°C
Min Max
70
—
45
—
1.0 14.5
1.0 14.0
1.0 18.0
1.0 17.5
7.0
—
5.0
—
0.5
—
7.0
—
7.0
—
Unit
Test
Conditions
V_CC = 3.3 ± 0.3 V
FROM
TO
(Input) (Output)
MHz
ns
C_L = 15 pF
C_L = 50 pF
C_L = 15 pF
PRE/CLR
CLK
Q or Q
C_L = 50 pF PRE/CLR Q or Q
CLK
ns
D
PRE or CLR inactive
ns
ns
PRE or CLR “L”
CLK “H” or “L”
Rev.5.00 Apr 07, 2006 page 5 of 8